Localized Thick Buried Insulator for Silicon Photonic Optical Isolation

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Solution Overview

Problem

SiPh PICs face significant optical power losses due to mode leakage into the silicon substrate, which impacts performance, necessitating improved optical isolation techniques.

Innovation Solution

A silicon photonic integrated circuit (SiPh IC) with a buried insulator layer of varying thickness, where the insulator is thinner where optical modes are confined and thicker where they expand, to minimize optical energy loss while maintaining thermal energy transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a thick buried insulator layer is used to reduce optical power loss, then optical isolation is improved, but thermal energy transfer is impeded

Engineering Contradiction:
Improveoptical power lossVSAvoidthermal energy transfer
Core Design Contradiction:
Loss of energyVSTemperature

Solution Approach 1:

The patent applies local quality by varying the insulator layer thickness according to the optical mode distribution: thicker insulator (e.g., 2-5 μm) is placed in regions where optical modes expand to reduce optical power loss, while thinner insulator (e.g., 0.5-1 μm) is maintained in regions where modes are confined to preserve thermal energy transfer. This spatially differentiated approach optimizes both optical isolation and thermal management in different locations of the photonic integrated circuit.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If the insulator thickness is increased to improve optical confinement, then optical isolation is improved, but device complexity increases

Engineering Contradiction:
Improveoptical power lossVSAvoidinsulator layer structure
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent implements parameter changes by modifying the insulator layer thickness parameter across different spatial regions of the substrate. The thickness transitions from a uniform value to a graded or stepped profile with multiple thickness zones (e.g., first thickness region, second thickness region, third thickness region), allowing optimization of optical confinement without requiring entirely new structural configurations.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces optical energy loss without impeding thermal energy transfer, enhancing PIC performance and efficiency.

Implementation Method 1

As an optical mode expands, mode leakage into a silicon substrate material becomes more significant and can lead to optical power losses

Methodology Applied
Scientific EffectTotal internal reflection: Total Internal Reflection

Implementation Method 2

maintaining thermal energy transfer

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250216601A1Silicon photonic integrated circuits with localized thick buried insulator
Publication Date: 2025.07.03 INTEL CORP
  • US20250216601A1 patent drawing
  • US20250216601A1 patent drawing
  • US20250216601A1 patent drawing

AI summary

A silicon photonic (SiPh) integrated circuit on a substrate comprising a buried insulator layer of varying thickness between an optical waveguide and an underlying silicon layer. The insulator layer has a first thickness under a first length of the waveguide and a second, greater, thickness under a second length of the waveguide. Buried insulator layer thickness may be thinner where an optical mode is to be more confined during operation of the SiPh IC, and buried insulator layer thickness may be greater within localized regions where optical mode is to expand during operation of the SiPh IC. Accordingly, a transfer of optical energy to an underlying silicon layer of the substrate may be curtailed within one substrate region without impeding the transfer of thermal energy to the underlying silicon layer within another substrate region.