Localized RDL for Embedded Component Packages

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Solution Overview

Problem

Fan Out Wafer Level Packaging (FOWLP) techniques face challenges in forming high aspect ratio openings and fine pitch redistribution layers due to the thick dielectric layer used, which limits the formation of small diameter openings and fine pitch metal layers, affecting the reliability and integration density of embedded component packages.

Innovation Solution

A localized redistribution layer (RDL) dielectric layer and conductive layer are formed selectively at specific locations, using a thin, photo-definable low modulus high elongation dielectric material to act as a stress buffer and enable the formation of small diameter openings and fine pitch bond pad exposure, while a primary RDL layer is formed blanket across the substrate to achieve comprehensive redistribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Shape

If a thick RDL dielectric layer is applied to smooth the unevenness of the embedded component substrate, then the substrate surface uniformity is improved, but the formation of high aspect ratio openings and fine pitch metal layers is prevented

Engineering Contradiction:
Improvesubstrate surface uniformityVSAvoidopening diameter and metal layer pitch
Core Design Contradiction:
ShapeVSManufacturing precision

Solution Approach 1:

The RDL dielectric layer is segmented into two distinct layers: a lower RDL dielectric layer applied directly to the embedded component substrate to smooth unevenness, and an upper RDL dielectric layer with smaller thickness applied over selected portions of the lower layer. This segmentation allows each layer to serve its specific function optimally without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The upper RDL dielectric layer is applied selectively only over selected portions of the lower RDL dielectric layer, rather than uniformly across the entire substrate. This local quality approach allows the thin upper layer to enable fine pitch features where needed while the thicker lower layer provides overall surface smoothing where required.

Inventive Principle:
Principle #3Local quality

2Reliability

If a thick dielectric layer is used to cover the embedded electronic components, then the components are well protected and surface irregularities are smoothed, but small diameter openings cannot be formed

Engineering Contradiction:
Improvecomponent protectionVSAvoidopening diameter
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The dielectric coverage is segmented into two layers with different thicknesses. The lower RDL dielectric layer provides thick coverage for component protection and surface smoothing, while the upper RDL dielectric layer provides thin coverage that allows small diameter openings to be formed through it to access bond pads.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The solution transitions from a single-dimensional (uniform thickness) dielectric layer to a two-dimensional (variable thickness) structure where the dielectric layer thickness changes across different regions and depths, enabling both protection and fine feature formation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Area of stationary object

If a uniform thick dielectric layer is applied across the entire substrate, then comprehensive coverage is achieved, but fine pitch redistribution layers cannot be formed

Engineering Contradiction:
Improvedielectric coverage areaVSAvoidmetal layer pitch
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The uniform dielectric coverage is segmented into two layers: a lower layer providing comprehensive thick coverage across the entire substrate, and an upper layer providing selective thin coverage only over specific portions where fine pitch features are required.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The upper RDL dielectric layer is applied with local quality - thin and selective - only over selected portions of the lower layer, enabling fine pitch metal layer formation in those specific regions while maintaining comprehensive coverage through the lower layer.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes defects, improves reliability, and allows for finer pitch and higher integration density by forming small diameter openings and fine pitch features, enhancing the overall performance and reliability of embedded component packages.

Implementation Method 1

using a thin, photo-definable low modulus high elongation dielectric material

Methodology Applied
Scientific EffectPhoto-definable: Photopolymerisation

Data Source

PatentUS10056360B2Localized redistribution layer structure for embedded component package and method
Publication Date: 2018.08.21 NXP USA INC
  • US10056360B2 patent drawing
  • US10056360B2 patent drawing
  • US10056360B2 patent drawing

AI summary

An embedded component package includes an embedded component substrate. The embedded component substrate includes an electronic component having an active surface including bond pads and a package body encapsulating the electronic component. The package body includes a principle surface coplanar with the active surface, A localized redistribution layer (RDL) dielectric layer is on the active surface. A localized RDL conductive layer is on the localized RDL dielectric layer and is coupled to the bond pads through openings in localized RDL dielectric layer. A primary RDL dielectric layer encloses the entire embedded component substrate and directly contacts the localized RDL dielectric layer, the localized RDL conductive layer, and the principal surface of the package body. The localized RDL conductive layer provides additional space for routing of additional interconnects while the localized RDL dielectric layer acts as a stress buffer.