Location-Based On-Chip Variation Factor Determination
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Solution Overview
Problem
Current techniques for determining on-chip variation (OCV) in integrated circuits are inadequate as they ignore wire delays and rely on worst-case PVT factors, leading to unduly pessimistic results and increased project time and costs due to the complexity of varying process, voltage, and temperature factors across the chip surface.
Innovation Solution
A location-based on-chip variation factor determination method that combines timing path delays with physical cell locations to accurately model OCV, using a bounding box to account for varying PVT factors and distance-dependent variations, resulting in a more accurate OCV analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If worst-case PVT assumptions are used for OCV determination, then reliability is improved, but manufacturing precision deteriorates due to pessimistic results
Solution Approach 1:
The patent divides the chip into different PVT regions and assigns different OCV factors to each region based on its specific characteristics. Instead of applying a single worst-case PVT assumption globally, the method calculates region-specific OCV factors by considering local process variations, voltage drops, and temperature effects. This allows each region to be evaluated with appropriate precision rather than uniform pessimism.
Solution Approach 2:
The patent segments the signal path into multiple segments spanning different PVT regions, and calculates OCV factors for each segment separately. By dividing the overall timing analysis into region-specific segments, the method captures local variations more accurately while maintaining overall timing reliability through cumulative segment evaluation.
2Device complexity
If single PVT point timing analysis is performed, then device complexity is reduced, but measurement precision deteriorates due to ignoring PVT variations
Solution Approach 1:
The timing analysis is segmented into multiple PVT region-specific analyses rather than a single global analysis. Each segment corresponds to a specific PVT region and uses appropriate PVT parameters for that region. This segmentation approach maintains manageable complexity by breaking down the problem into smaller, region-specific sub-problems while improving measurement precision through localized accuracy.
Solution Approach 2:
The patent changes the PVT parameters used in timing analysis based on the specific PVT region being analyzed. Instead of using fixed single-point PVT values, the method dynamically selects and applies PVT parameters that reflect the actual conditions of each chip region, thereby improving measurement precision without excessively increasing complexity.
3Ease of manufacture
If wire delays are ignored in OCV determination, then ease of manufacture is improved, but measurement precision deteriorates
Solution Approach 1:
The patent applies partial action by including wire delays only in regions where they significantly impact timing, rather than uniformly across all signal paths. By selectively incorporating wire delay calculations based on their actual impact magnitude, the method improves measurement precision for critical paths while maintaining ease of manufacture for less critical paths where wire delays are negligible.
Data Source
AI summary
Techniques for determining a location-based on-chip variation factor for an integrated circuit device are provided. A first on-chip variation factor is computed for at least one of two or more signal paths of the integrated circuit device. The first on-chip variation factor is a function of a timing delay. A second on-chip variation factor is also computed for the integrated circuit device. The second on-chip variation factor is a function of a physical layout of the integrated circuit device. The first on-chip variation factor and the second on-chip variation factor are combined for the at least one of the two or more signal paths to determine a location-based on-chip variation factor for the at least one of the two or more signal paths.