Location Locked Circuit Layout for IC Integrity Verification
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Solution Overview
Problem
The integrated circuit (IC) design and manufacturing process faces challenges in detecting inadvertent or malicious changes between the original intended design and the manufactured IC component, as it is difficult to verify the integrity of the semiconductor product during the interaction between the customer and the IC foundry.
Innovation Solution
The development of an enhanced IC component library with location-sensitive cells networked in a mesh architecture, along with algorithms that fill unused space, creates a Location Locked Circuit Layout with Measurable Integrity (LLCLMI), which includes design placement rules to physically lock down circuit placement and detect unauthorized modifications by using test vectors to characterize the relative position of cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional IC design and manufacturing process is used, then manufacturing efficiency and cost are maintained, but design integrity cannot be verified between original design and manufactured component
Solution Approach 1:
The IC structure is segmented into functional circuit elements and location-sensitive circuit elements (LSCs). The LSCs are specifically designed to detect their physical location and arrangement, creating distinct segments that can independently verify their position within the overall IC architecture.
Solution Approach 2:
Location-sensitive circuits act as intermediary elements between the functional circuitry and the verification process. These LSCs detect and report their physical location and arrangement, serving as mediators that provide integrity information without directly performing the primary functional operations.
2Reliability
If location-sensitive circuits are added to detect unauthorized modifications, then design integrity verification is enabled, but IC component count and layout complexity increase
Solution Approach 1:
The location-sensitive circuits serve multiple functions: they detect their own physical location, verify their arrangement relative to other LSCs, and collectively provide integrity verification for the entire IC. This multi-functionality reduces the need for separate verification mechanisms.
Solution Approach 2:
The verification functionality is merged into the manufacturing process itself. The LSCs are integrated during the standard IC fabrication process, and their verification function is combined with the normal operational testing, allowing integrity checks to occur alongside functional testing without requiring entirely separate processes.
3Reliability
If all unused space on IC is filled with additional elements, then tampering opportunities are minimized, but manufacturing precision requirements increase
Solution Approach 1:
The algorithm fills unused space with additional LSCs during the design phase, before manufacturing begins. This preliminary action ensures that no empty space remains that could be exploited for tampering, and the placement is pre-calculated to maintain appropriate spacing and connectivity.
Solution Approach 2:
The additional LSCs fill unused space and simultaneously serve the dual purpose of occupying potential tampering locations and providing additional verification points. The same elements that fill the space also contribute to the integrity verification network, making the verification capability self-providing rather than requiring separate components.
Data Source
AI summary
Techniques to determine whether the design of integrated circuit (IC) has been tampered with during wafer manufacturing by using an enhanced library and layout methodology. The enhanced library may include location sensitive cells networked together in a mesh architecture where paths through the mesh can be used to detect relative position of location sensitive cells. The techniques further include algorithms that fill any unused space on an IC with additional elements from the enhanced library to minimize the opportunity to modify the IC by including additional circuit function or manipulating the layout. By physically locking down the circuit placement such that there is no available area and gives improved ability to detect changes in the physical location behavior of the circuit, therefore reduces the risk that unauthorized circuit manipulation will go undetected.