Lock-Free Array Queues for 5G-NR Data Sharing

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Solution Overview

Problem

Current data processing techniques for 5G signal processing and other applications experience high latency due to slow memory operations, leading to delays in data sharing between processes.

Innovation Solution

The implementation of lock-free data structures, specifically statically-sized regions of linked storage locations organized as lock-free array queues, enables efficient data sharing between processes without the need for locking mechanisms, allowing for faster data transmission and processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If current memory operations techniques are used for data sharing between processes, then data sharing is achieved, but high latency occurs and processing speed slows down

Engineering Contradiction:
Improvedata sharing capabilityVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces a lock-free data structure as an intermediary mechanism between processes for data sharing. This mediator uses atomic operations and compare-and-swap (CAS) instructions to enable safe concurrent access without traditional locking, thereby reducing latency while maintaining data sharing reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces traditional mechanical locking mechanisms with atomic hardware instructions (CAS operations). This substitution eliminates the overhead of lock acquisition and release, replacing it with更高效 atomic compare-and-swap operations that reduce time loss while maintaining data sharing functionality

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If locking mechanisms are used for data sharing between processes, then data access safety is ensured, but processing speed decreases due to lock overhead

Engineering Contradiction:
Improvedata access safetyVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent substitutes traditional locking mechanisms with atomic compare-and-swap operations at the hardware level. This replacement eliminates lock acquisition overhead and deadwait times, improving processing speed while maintaining data access safety through atomic operation guarantees

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the fundamental parameter of synchronization from software-based locking to hardware-based atomic operations. By utilizing CPU atomic instructions and CAS operations, the system achieves both safety and speed through changed operational parameters rather than traditional locking approaches

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240193020A1Application programming interface to invalidate information in fifth generation new radio (5g-NR) statically-sized linked storage
Publication Date: 2024.06.13 NVIDIA CORP
  • US20240193020A1 patent drawing
  • US20240193020A1 patent drawing
  • US20240193020A1 patent drawing

AI summary

Apparatuses, systems, and techniques to perform and facilitate lock-free data sharing between processes performing computations in fifth generation (5G) new radio (NR) wireless communication. In at least one embodiment, 5G-NR information stored by one or more statically-sized regions of linked storage locations is to be invalidated in response to an application programming interface (API).