Lock-Free Inference Graph Node Updates

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Solution Overview

Problem

Current parallelization techniques for graph inference algorithms in large-scale graphical models are inefficient, leading to time-consuming processing even when executed in parallel across multiple machines, often taking hours to complete.

Innovation Solution

A lock-free in-memory graph inference engine using a hybrid computing mode that combines asynchronous parallelization and bulk synchronization, allowing threads to update global state without locks and enforcing barriers periodically to ensure consistency, enabling efficient node updates in inference graphs without locking mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If lock-free concurrent updates are used in graph inference algorithms, then processing speed and parallelization efficiency are improved, but data consistency and reliability deteriorate

Engineering Contradiction:
Improveprocessing speedVSAvoiddata consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements periodic barrier synchronization where threads periodically stop at barrier points between supersteps to synchronize their progress. This periodic synchronization ensures data consistency while allowing asynchronous operations within each superstep, resolving the contradiction between speed and reliability by balancing lock-free concurrency with periodic consistency checks.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent segments the graph inference algorithm into discrete supersteps, where each superstep consists of multiple tasks that can be executed asynchronously. By dividing the computation into manageable segments with defined synchronization points, the system achieves parallelization efficiency while maintaining data consistency through structured barrier synchronization at segment boundaries.

Inventive Principle:
Principle #1Segmentation

2Reliability

If barrier synchronization is enforced periodically, then data consistency is improved, but processing time increases

Engineering Contradiction:
Improvedata consistencyVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Barrier synchronization is enforced periodically at superstep boundaries rather than continuously. This periodic approach ensures data consistency is maintained at critical synchronization points while minimizing the impact on processing time by allowing asynchronous execution within each superstep, thus reducing the frequency and overhead of synchronization operations.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies barrier synchronization partially, only at necessary superstep boundaries rather than after every operation. This selective synchronization approach provides sufficient data consistency for correct algorithm execution while avoiding excessive synchronization overhead that would increase processing time unnecessarily.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10853149B2Updating inference graph absent node locking
Publication Date: 2020.12.01 MICRO FOCUS LLC
  • US10853149B2 patent drawing
  • US10853149B2 patent drawing
  • US10853149B2 patent drawing

AI summary

Example implementations relate to updating an inference graph absent node locking. For example, a processor executing a first thread may receive a first task for updating a node of an inference graph stored by a storage device accessible to a second thread, the first task being assigned during a first iteration of a graph update loop. Absent locking the node from access by the second thread, the processor may generate a value for the node and update the node with the value. Based on detecting that each node of the inference graph has been updated, the processor may continue with a second iteration of the graph update loop.