Multi-Injection Lock Ring Phase Interpolator for I-Q Skew Reduction
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Solution Overview
Problem
Phase interpolators in high-speed serial data communications suffer from timing errors due to integral non-linearity, differential non-linearity, and phase to quadrature skew, which prevent optimal re-sampling of incoming data streams.
Innovation Solution
A multiple injection lock ring-based phase interpolator is introduced, allowing for the injection of multiple clock signals at various points along the ring chain, which improves linearity and phase matching by minimizing asymmetry and I-Q skew through a cascade of delay stages with differential amplifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional phase interpolator is used to generate interpolated clock signals, then the receiver can track the incoming data stream, but timing errors occur due to integral non-linearity, differential non-linearity, and phase to quadrature skew
Solution Approach 1:
The phase interpolator is divided into multiple delay stages (first, second, third, and fourth delay stages) arranged in a ring configuration. Each stage independently processes clock signals and contributes to the final interpolated output, allowing for better control of phase transitions and reduced non-linearity effects through distributed processing.
Solution Approach 2:
The patent introduces asymmetric current injection mechanisms where different tail currents are applied to different delay stages based on control signals. This asymmetric current distribution compensates for inherent symmetries that cause phase-to-quadrature skew and differential non-linearity, thereby improving timing accuracy.
2Manufacturing precision
If multiple delay stages are used to reduce timing errors, then linearity and phase matching improve, but device complexity increases
Solution Approach 1:
Multiple delay stages are merged into a unified ring-based architecture where the output of one stage feeds into the next, forming a closed loop. This merging approach allows the system to achieve high linearity through cumulative phase adjustment while sharing common control structures and current sources across all stages.
Solution Approach 2:
Each delay stage in the ring configuration serves multiple functions: it delays the clock signal, contributes to phase interpolation, and responds to control signals for dynamic adjustment. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby managing complexity despite the multi-stage design.
Data Source
AI summary
Various embodiments described herein provide a multiple injection lock ring-based PI that can inject a plurality of clock signals, of different phases, at injection points disposed along the ring chain of the PI and lock phase to those received clock signals (injected clock signals). For instance, an embodiment described herein may provide a multiple injection lock ring-based PI that permits double injection, triple injection, or the like, of clock signals external into the PI.