Locked-Loop DCO Gain Normalization Under PVT Variation
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Solution Overview
Problem
Digital phase-locked loops face challenges in compensating for digitally-controlled oscillator (DCO) gain variations due to process, voltage, and temperature (PVT) variations, leading to errors in frequency and phase output signals.
Innovation Solution
A method involving DCO gain normalization, where a scaling factor is determined based on the ratio of actual to nominal DCO gain, applied to the loop filter's gain constants to adjust the DCO codewords, ensuring accurate frequency and phase adjustments, and an ultrafast locking mechanism is implemented by initializing the PLL with a calibration codeword and phase alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional DCO circuits are used without gain normalization, then the circuit complexity is lower, but DCO gain variation occurs under PVT conditions leading to frequency and phase errors
Solution Approach 1:
The patent performs DCO gain normalization during an initialization phase before normal operation. A calibration routine measures the actual DCO gain under current PVT conditions and computes a normalization factor that is stored for subsequent use. This preliminary action eliminates gain variations before they affect frequency accuracy, while keeping the operational circuit simple.
Solution Approach 2:
The patent changes the DCO control parameter by applying a normalization factor to the DCO control words. This factor adjusts the DCO gain dynamically based on measured PVT conditions, allowing the system to maintain frequency accuracy without hardware modifications. The control parameter transformation occurs in the digital domain, maintaining simplicity.
2Measurement precision
If DCO gain normalization is implemented, then frequency and phase accuracy is improved, but the locking time increases due to additional calibration steps
Solution Approach 1:
The patent implements DCO gain normalization periodically rather than continuously. The calibration routine executes once during initialization or when PVT conditions change significantly, rather than during every phase-locking event. This periodic approach maintains high phase accuracy while minimizing the time penalty to locking.
Solution Approach 2:
The patent performs gain normalization in advance during system initialization or factory calibration, so that when the PLL needs to lock, the normalization factor is already computed and stored. This eliminates the need to perform calibration during time-critical locking operations, thus maintaining fast locking while achieving accurate phase measurement.
3Reliability
If scaling factors are applied to loop filter gain constants, then DCO gain variations are compensated, but the system adaptability decreases due to fixed normalization factors
Solution Approach 1:
The patent implements dynamic gain normalization where the normalization factor is not fixed but can be updated when PVT conditions change. The system monitors temperature, voltage, or process parameters and recalibrates the DCO gain normalization factor accordingly. This dynamic approach maintains gain stability while preserving system adaptability to changing environmental conditions.
Solution Approach 2:
The patent employs feedback mechanisms where the actual DCO output frequency is measured and compared to the expected frequency. Based on this feedback, the normalization factor is adjusted to compensate for PVT variations. This closed-loop approach ensures both gain stability and adaptability, as the system continuously corrects for environmental changes.
Data Source
AI summary
A method of operation in a locked-loop circuit. The locked-loop circuit includes a loop filter and a digitally-controlled oscillator (DCO) coupled to the output of the loop filter. The loop filter includes a first input to receive a digital word representing a difference between a reference clock frequency and a DCO output frequency. The method includes determining a calibration DCO codeword representing a calibration operating point for the locked-loop circuit; determining a scaling factor based on the calibration operating point, the scaling factor based on a ratio of an actual DCO gain to a nominal DCO gain; and applying the scaling factor to operating parameters of the loop filter.