Digital Locked Loop Hysteresis and Tracking Speed Control

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Solution Overview

Problem

Conventional locked loops, such as DLLs and PLLs, lack the ability to easily adjust operating parameters like hysteresis and tracking speed, leading to performance limitations in various applications, as these parameters are not optimized for specific use cases.

Innovation Solution

Incorporating a phase detector with an adjustable hysteresis control and frequency dividers that can be enabled or disabled to adjust the tracking speed, allowing users to customize the loop's operation based on power consumption and noise immunity needs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the hysteresis is reduced to make the loop tighter and improve phase tracking accuracy, then the phase accuracy is improved, but the power consumption increases due to more frequent delay line adjustments

Engineering Contradiction:
Improvephase accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic adjustment of the hysteresis window size based on operating conditions. The hysteresis controller can switch between different hysteresis levels (first and second hysteresis values) depending on whether the loop is acquiring signal or tracking signal, allowing the system to optimize between phase accuracy and power consumption in different operational states

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If the hysteresis is increased to reduce power consumption, then the power consumption is reduced, but the phase accuracy deteriorates as the output clock phase can drift farther from the reference clock phase

Engineering Contradiction:
Improvepower consumptionVSAvoidphase accuracy
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The system dynamically adjusts hysteresis window size based on operational state. During signal acquisition, a larger hysteresis value is used to reduce power consumption and improve noise immunity. During signal tracking, the hysteresis is reduced to maintain tight phase control and high phase accuracy, thus resolving the contradiction between power savings and phase precision

Inventive Principle:
Principle #15Dynamics

3Speed

If the tracking speed is increased to improve phase following capability, then the phase tracking capability is improved, but the power consumption increases due to more frequent phase comparisons and adjustments

Engineering Contradiction:
Improvetracking speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic adjustment of the delay line rather than continuous adjustment. The controller can vary the adjustment period based on whether the system is acquiring or tracking the signal. This periodic action reduces the frequency of power-consuming operations while maintaining effective phase control, thus resolving the contradiction between tracking speed and power consumption

Inventive Principle:
Principle #19Periodic action

4Reliability

If a small hysteresis is used to improve noise immunity, then the noise immunity is improved, but the DLL becomes more susceptible to noise moments that increase phase difference beyond tolerance

Engineering Contradiction:
Improvenoise immunityVSAvoidsusceptibility to noise
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The hysteresis window size is dynamically adjusted based on operational state. During signal acquisition, a larger hysteresis provides greater noise immunity by tolerating larger phase variations. During signal tracking, a smaller hysteresis provides better noise rejection by being more sensitive to phase errors. This dynamic adjustment resolves the contradiction between noise immunity and susceptibility to noise

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7928782B2Digital locked loops and methods with configurable operating parameters
Publication Date: 2011.04.19 MICRON TECHNOLOGY INC
  • US7928782B2 patent drawing
  • US7928782B2 patent drawing
  • US7928782B2 patent drawing

AI summary

A locked loop may have an adjustable hysteresis and/or a tracking speed that can be programmed by a user of an electronic device containing the locked loop or controlled by an integrated circuit device containing the locked loop during operation of the device. The looked loop may include a phase detector having a variable hysteresis, which may be coupled to receive a reference clock signal and an output clock signal from a phase adjustment circuit through respective frequency dividers that can vary the rate at which the phase detector compares the phase of the output clock signal to the phase of the reference clock signal, thus varying the tracking speed of the loop. The hysteresis and tracking speed of the locked loop may be programmed using a variety of means, such as by a temperature sensor for the electronic device, a mode register, a memory device command decoder, etc.