Locking Corner Mark Segmentation for Semiconductor Pattern Location

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Solution Overview

Problem

In semiconductor fabrication, existing mark designs for locating patterns are inadequate due to limitations in feature size, repeated exposures leading to pattern merge risks, and increased complexity in measurement steps, especially for small feature sizes and cross-shaped marks.

Innovation Solution

A locking corner mark is divided into four quarters, each patterned at the corners of adjacent shots, with each quarter being symmetric and separated by a nominally same distance, and optionally featuring an array of repetitive patterns to match device pattern sizes, reducing exposure risks and complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a cross-shaped mark is used for locating patterns, then the mark is distinguishable and can serve as an origin for coordinate systems, but repeated exposures lead to pattern merge risks and increased measurement complexity

Engineering Contradiction:
Improvedistinguishability of markVSAvoidmeasurement complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The cross-shaped mark is divided into four separate quarter marks, each positioned in a different shot. Each quarter mark is exposed and patterned independently through separate lithography exposures, eliminating the pattern merge risk that occurs when a single cross-shaped mark is exposed multiple times. The four quarter marks collectively serve the same function as the original cross-shaped mark for coordinate system establishment.

Inventive Principle:
Principle #1Segmentation

2Length of moving object

If feature size is reduced for smaller device patterns, then the mark can accommodate smaller device features, but pattern merge risks increase due to repeated exposures

Engineering Contradiction:
Improvefeature sizeVSAvoidpattern merge risk
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

By segmenting the cross-shaped mark into four quarter marks positioned in separate shots, each quarter mark undergoes only a single lithography exposure. This eliminates the pattern merge risk that plagues small feature sizes when the same mark is exposed repeatedly. The quarter marks maintain sufficient feature size for distinguishability while avoiding the merge issue through their distributed positioning.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If a single mark is exposed multiple times for different shots, then the mark can be used across multiple shots, but pattern merge risks and measurement complexity increase

Engineering Contradiction:
Improvemark reusability across shotsVSAvoidpattern merge risk
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

Instead of using a single mark exposed multiple times, the invention segments the mark into four quarter marks, each positioned in a different shot. Each quarter mark is exposed only once during its respective lithography process, eliminating pattern merge risk while maintaining the ability to establish coordinate systems across all four shots. The quarter marks are later used collectively for overlay measurement.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The solution moves from a single spatial location (one mark in one shot) to a distributed spatial arrangement (four quarter marks in four different shots). This dimensional redistribution allows each mark component to be exposed only once while collectively serving all four shots, resolving the contradiction between mark reusability and pattern merge risk.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10811363B2Marks for locating patterns in semiconductor fabrication
Publication Date: 2020.10.20 YANGTZE MEMORY TECH CO LTD
  • US10811363B2 patent drawing
  • US10811363B2 patent drawing
  • US10811363B2 patent drawing

AI summary

Embodiments of semiconductor fabrication methods are disclosed. In an example, a method for forming a mark for locating patterns in semiconductor fabrication is disclosed. A wafer is divided into a plurality of shots. Each of the plurality of shots includes a semiconductor chip die. Four quarters of a locking corner mark are subsequently patterned, respectively, at four corners of four adjacent shots of the plurality of shots. Each quarter of the locking corner mark is symmetric to adjacent quarters of the locking corner mark and is separated from the adjacent quarters of the locking corner mark by a nominally same distance. The locking corner mark is set as an origin for locating patterns in at least one of the four adjacent shots in semiconductor fabrication.