Lockless Hierarchical Bandwidth Management for Multiprocessor NPUs
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Solution Overview
Problem
Networking equipment with both control and data planes faces bandwidth limitations and complexity in managing network traffic, particularly in moving packets between the control plane and data plane, as well as among parallel packet engines within Network Processing Units (NPUs, leading to bottlenecks and difficulty in programming.
Innovation Solution
Implementation of hierarchical bandwidth partitions using a Hierarchical Token Bucket (HTB) algorithm with atomic data structures in a network processor unit, allowing for coordinated bandwidth management across multiple processor environments by passing target bandwidth rates from parent to child partitions, enabling efficient packet sampling and scheduling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional bandwidth management methods are used in multi-core processor environments, then system complexity increases and bottlenecks occur, but bandwidth management efficiency decreases
Solution Approach 1:
The patent divides the bandwidth management system into hierarchical partitions (root partition and child partitions) that can be independently managed. Each partition has its own token bucket parameters (rate, ceiling, token count) and can be configured separately, allowing complex bandwidth management to be broken down into simpler, manageable segments across multiple processor cores.
Solution Approach 2:
The patent introduces a hierarchical dimension to bandwidth management by organizing partitions in a tree structure with root and child levels. This hierarchical arrangement adds a new organizational dimension that allows bandwidth resources to be allocated and managed across multiple processor cores in a structured way, reducing system complexity while improving efficiency.
2Ease of operation
If packets are moved between control plane and data plane or among parallel packet engines, then traffic control capability improves, but bottlenecks and bandwidth limitations occur
Solution Approach 1:
The patent introduces atomic data structures as intermediaries between processor cores that need to share bandwidth management state. These atomic structures provide lock-free access to shared resources, allowing packets to be moved between control plane and data plane or among parallel packet engines without creating bottlenecks, while maintaining traffic control capability.
Solution Approach 2:
The patent replaces traditional lock-based synchronization mechanisms with atomic data structures and lock-free algorithms. This substitution eliminates the mechanical bottlenecks that occur when multiple processor cores compete for access to shared bandwidth management resources, thereby improving bandwidth throughput while maintaining traffic control capability.
3Productivity
If hierarchical bandwidth partitions with atomic data structures are implemented, then bandwidth management efficiency improves and bottlenecks are reduced, but implementation complexity increases
Solution Approach 1:
The patent creates universal atomic data structures that can be used across all processor cores and all bandwidth partitions. These atomic structures serve multiple functions simultaneously (synchronization, state sharing, bandwidth tracking) and can be applied throughout the entire hierarchical partition structure, reducing implementation complexity despite the sophisticated bandwidth management capabilities.
4Ease of operation
If target bandwidth rates are passed from parent to child partitions, then coordinated bandwidth management improves, but computational overhead increases
Solution Approach 1:
The patent performs preliminary configuration of bandwidth rates by passing target bandwidth rates from parent to child partitions during system initialization or configuration phases. This preliminary action establishes the bandwidth hierarchy in advance, allowing the system to operate efficiently during packet forwarding without repeated computational overhead for rate coordination.
Data Source
AI summary
An example embodiment of the invention provides a process for lockless processing of hierarchical bandwidth partitions configurations in multiple processor architectures. In one embodiment, the process runs in an NPU's data plane and receives a packet for a partition from a child partition through a work queue. The process determines a suggested target bandwidth rate for the receiving partition's child partitions, based in part on a count of active child partitions, if a predefined time interval has passed. The process adopts a target bandwidth rate for the receiving partition suggested by the receiving partition's parent partition, if the receiving partition is not a root partition and the predefined time interval has passed. The process then transmits the packet to the receiving partition's parent partition through the work queue, if the receiving partition is not a root partition. Otherwise, the process transmits the packet to a port.