Hardware Lockstep Comparator Masking for Mis-Compare Debugging

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Solution Overview

Problem

Current hardware lockstep systems are inefficient in handling fault detections, often leading to unnecessary shutdowns due to non-deterministic divergences and the inability to distinguish between fatal and trivial discrepancies.

Innovation Solution

A masking mechanism is implemented at multiple levels of the hardware comparator structure, using a combination of group-level and signal-level mask bits to mask out trivial or expected faults, thereby preventing uncorrectable shutdowns and enabling forward progress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hardware lockstep systems trigger halt state on any mis-compare detection, then system reliability is improved by catching potential defects, but system productivity deteriorates due to frequent shutdowns from non-deterministic divergences

Engineering Contradiction:
Improvefault detection capabilityVSAvoidsystem availability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the comparator structure into multiple hierarchical levels (individual signal comparators, group comparators, and system-level comparators). This segmentation allows the system to handle different types of mis-comparles at appropriate levels, filtering out non-deterministic divergences at lower levels while maintaining reliability for actual defects at higher levels.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by implementing different comparison and masking strategies at different hierarchical levels of the comparator structure. Each level has tailored masking capabilities and comparison logic suited to the specific type of signals being compared, allowing precise discrimination between trivial and critical mis-comparles.

Inventive Principle:
Principle #3Local quality

2Difficulty of detecting and measuring

If conventional debug methods are used for root cause analysis, then defect identification is attempted, but system complexity increases and debug efficiency decreases due to inability to distinguish fatal from trivial discrepancies

Engineering Contradiction:
Improveroot cause identificationVSAvoiddebugging system complexity
Core Design Contradiction:
Difficulty of detecting and measuringVSDevice complexity

Solution Approach 1:

The patent performs preliminary actions by implementing hierarchical filtering and masking mechanisms that pre-process and categorize mis-compare events before they reach the debug system. This preliminary classification eliminates the need for complex post-processing analysis, as trivial divergences are filtered out in advance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces intermediary components (masking circuits, group comparators, and control logic) that mediate between the raw comparator outputs and the debug system. These intermediaries preprocess the data, filtering and categorizing mis-comparles before they reach conventional debug methods, thereby simplifying the debugging process.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4564174A1Apparatus and method for controlling and debugging hardware lockstep MIS-compares
Publication Date: 2025.06.04 INTEL CORP
  • EP4564174A1 patent drawingFigure 1
  • EP4564174A1 patent drawingFigure 2
  • EP4564174A1 patent drawingFigure 3(A)

AI summary

An apparatus and method for controlling and debugging hardware lockstep mis-compares. For example, one embodiment of a processor comprises: a plurality of processing elements operable in a redundancy mode, the plurality of processing elements to each execute a same plurality of instructions and produce a corresponding plurality of result signals; comparator circuitry to compare corresponding result signals of the plurality of result signals, the comparator circuitry to generate one or more failure indications when a first one or more result signals produced by a first processing element are different from a corresponding second one or more result signals produced by a second processing element; and masking circuitry to mask a first failure indication of the one or more failure indications when a corresponding mask bit of a mask matrix is set to a first value.