Core Reconfiguration Control for Lockstep-to-Multicore Recovery
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Solution Overview
Problem
Conventional multi-core and lockstep core configurations face challenges in achieving high performance and reliability at a low cost, particularly in industrial and embedded applications, due to increased circuit area, power consumption, and complex reconfiguration requirements.
Innovation Solution
A reconfiguration control device that dynamically switches a lockstep core to a multi-core operation when errors occur, allowing the system to continue functioning with redundant software operation without requiring additional hardware, thereby reducing costs and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant lockstep cores are prepared for executing multi-core programs, then reliability is improved, but circuit area and cost increase
Solution Approach 1:
The system dynamically switches between multi-core operation mode and lockstep core operation mode based on error detection results. The lockstep core can be switched to replace a failed multi-core, or the failed core can be restarted after error correction. This dynamic reconfiguration capability ensures reliability while avoiding the need for permanently dedicated redundant cores, thus reducing circuit area.
Solution Approach 2:
The lockstep core is designed to serve multiple functions: it can operate in lockstep mode for high-reliability critical tasks, be switched to replace failed multi-cores, or have its error detection capability used to trigger restarts of failed cores. This multi-functionality eliminates the need for separate dedicated redundant cores for each function, reducing overall circuit area while maintaining reliability.
2Productivity
If high-performance CPUs are used for multi-core implementation, then processing performance is improved, but circuit area and power consumption increase
Solution Approach 1:
The system dynamically selects between multi-core and lockstep operation modes based on task requirements and error states. High-performance multi-core is used for computationally intensive tasks when no errors are detected, while lockstep mode is activated for safety-critical operations or when errors occur in multi-core, optimizing the balance between performance and reliability.
Solution Approach 2:
The system changes operational parameters by switching between different execution modes (multi-core vs. lockstep) and dynamically adjusting CPU frequency or core activation based on workload and error conditions. This allows the system to achieve high performance when needed while reducing power consumption during normal operation or when using the more power-efficient lockstep mode for less demanding tasks.
3Reliability
If redundant ECUs are required for reconfiguration, then reliability is improved, but cost and control complexity increase
Solution Approach 1:
The patent merges the reconfiguration control functionality directly into the system control unit that already manages multi-core and lockstep core operations. The same control unit that detects errors and manages normal operation also handles the switching and restart operations, eliminating the need for separate redundant ECUs and their associated control logic, thus reducing system complexity while maintaining reliability.
Solution Approach 2:
The system implements self-diagnosis and self-reconfiguration capabilities where the system control unit automatically detects errors, determines the appropriate recovery action (switching to lockstep core or restarting failed core), and executes the reconfiguration without external intervention. This self-service approach reduces the need for complex external control mechanisms and redundant ECUs.
Data Source
AI summary
In the invention, a problem is solved in which, in order to achieve high performance and high reliability with the conventional multi-core and lockstep core, a redundant lockstep core is necessarily prepared to execute a multi-core program in which an error has occurred, a circuit area increases, and a cost and a power consumption increase. In the invention, a safe operation of a control system is secured by operating a software program operating on a multi-core in which an error has occurred as degenerate software on a core switched from a lockstep operation to a multi-core operation.