LOCOS Field Oxide Confinement for Scaled High-Voltage MOS Transistors
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Solution Overview
Problem
High-voltage MOS transistors with local oxidation of silicon (LOCOS) structures face challenges in dimension shrinkage due to undesirable bird's beak profiles, which hinder integration with advanced transistors and increase complexity.
Innovation Solution
A nitride-based spacer layer is used to block lateral extension of the LOCOS structure, confining it within a recess and minimizing its lateral extent, allowing for a more scalable high-voltage transistor design with reduced channel length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If LOCOS structure is formed without nitride spacer, then gate oxide can be formed, but bird's beak profile causes undesirable lateral extension and prevents dimension shrinkage
Solution Approach 1:
A nitride-based spacer layer is formed along the sidewall of the recess before forming the field oxide layer. This preliminary action creates a physical barrier that prevents lateral extension of the gate oxide during subsequent processing steps, thereby controlling the bird's beak profile and enabling dimension shrinkage.
Solution Approach 2:
The nitride-based spacer layer acts as an intermediary barrier between the field oxide layer and the silicon substrate. It mediates the lateral extension process by blocking oxygen diffusion, thereby preventing the bird's beak profile from extending beyond the desired region while allowing vertical oxide growth.
2Adaptability or versatility
If LOCOS structure extends laterally, then gate oxide is formed, but integration with advanced transistors becomes complex
Solution Approach 1:
The nitride spacer is formed in advance to define precise lateral boundaries for the LOCOS structure. This preliminary boundary definition ensures compatibility with advanced transistor geometries and simplifies subsequent integration processes by preventing unwanted lateral extensions that would complicate device layout and fabrication.
3Length of moving object
If nitride spacer is used to block lateral extension, then dimension shrinkage is enabled, but additional process step is required
Solution Approach 1:
The nitride-based spacer layer is formed as a preliminary structure using standard deposition and etching techniques. Although this adds a process step, it enables significant dimension shrinkage and improves manufacturing precision, which are critical for advanced technology nodes. The spacer formation integrates seamlessly with existing fabrication workflows.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of high-voltage transistors with reduced dimensions, enhancing their scalability and integration with low-voltage devices, improving the Power-Performance-Area (PPA) of integrated circuits.
Implementation Method 1
a dielectric spacer layer over the oxide liner layer that also extends along the first sidewall... wherein the dielectric spacer layer is configured to block oxygen atoms from diffusing outside the first sidewall during the thermal oxidation step
Implementation Method 2
thermally oxidizing at least a portion of the semiconductor substrate disposed beneath the bottom surface, thereby converting the portion of the semiconductor substrate that the oxide liner layer overlays the bottom surface into a field oxide layer
Implementation Method 3
block oxygen atoms from diffusing outside the first sidewall during the thermal oxidation step
Data Source
AI summary
A method for fabricating semiconductor devices is disclosed. The method includes forming a recess along a top surface of a semiconductor substrate. The method includes forming a nitride-based spacer layer extending along a first sidewall of the recess. The method includes forming a field oxide layer in the recess extending along a bottom surface of the recess, while a lateral tip of the field oxide layer is blocked from extending into any portion of the semiconductor substrate other than the recess by the nitride-based spacer layer.