Graphics Processor LOD Interpolation for Power Reduction
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Solution Overview
Problem
Conventional graphics processors require high power consumption and cost due to their deep pipeline architecture, making them unsuitable for mobile and wireless applications.
Innovation Solution
A method and system for determining pixel parameters in three-dimensional graphics processing that reduces computational workload by evaluating level-of-detail (LOD) parameters at vertices and interpolating them over pixels, using a setup module, raster module, and data fetch module to propagate final LOD values for rendering, thereby reducing power consumption and chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional deep pipeline architecture is used for graphics processing, then high quality rendering and fast rendering speed are achieved, but power consumption and chip area increase significantly
Solution Approach 1:
The patent segments the LOD computation task by evaluating LOD parameters only at vertex points rather than for every pixel. The vertex shader computes LOD interpolant values at vertices, and these values are then interpolated across the primitive to determine pixel-level LOD values. This segmentation reduces the number of computations from per-pixel to per-vertex, significantly lowering power consumption while maintaining rendering quality.
Solution Approach 2:
The patent applies partial action by computing LOD values only where necessary (at vertices) and using interpolation to derive values for intermediate pixels. Instead of performing full LOD evaluation for every pixel, the system performs partial evaluation at vertices and uses mathematical interpolation to obtain pixel-level values, reducing overall computational workload and power consumption.
2Manufacturing precision
If conventional deep pipeline architecture with high precision functions is used, then high quality rendering is achieved, but transistor count and chip area increase
Solution Approach 1:
The patent segments the rendering pipeline into distinct stages: vertex processing where LOD interpolant values are computed, rasterization where primitives are converted to pixels, and fragment processing where interpolated LOD values are used. This segmentation allows each stage to perform only necessary computations with appropriate precision, reducing the need for high-precision functions throughout the entire pipeline and thereby reducing chip area.
Solution Approach 2:
The patent performs preliminary LOD computation at the vertex stage, calculating LOD interpolant values before rasterization. This preliminary action allows the rasterization and fragment processing stages to use pre-computed values through interpolation, eliminating the need for redundant high-precision LOD computations in later stages and reducing overall chip area requirements.
3Productivity
If dedicated stages in deep pipeline architecture are used, then fast rendering throughput is achieved, but idle processing cycles still consume significant power
Solution Approach 1:
The patent introduces dynamic power management to the graphics pipeline by making power consumption dependent on actual processing workload. The system dynamically adjusts power states of pipeline stages based on whether they are actively processing vertices, pixels, or are idle. This dynamic approach allows the system to maintain high rendering throughput when needed while minimizing power consumption during idle periods, directly addressing the contradiction between throughput and energy waste.
Data Source
AI summary
A method determining LOD values for a geometric primitive, in accordance with one embodiment of the present invention, includes accessing a plurality of geometric parameters of a vertex. An LOD value for a vertex is calculated as a function of the plurality of parameters of the vertex in a setup module. In a raster module an LOD value for a pixel is interpolated as a function of the LOD value of the pixel corresponding to the vertex and a view distance of the non-vertex pixel.