Logarithmic Current-Voltage Converter With Feedback-Stabilized Dynamic Range
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Solution Overview
Problem
Existing logarithmic detectors, such as trans-linear logarithmic detectors, face performance issues like poor log-linear dynamic range for small input currents due to non-zero collector-to-base voltage in NPN bipolar transistors.
Innovation Solution
A logarithmic current to voltage converter is designed with a first field-effect transistor (FET) and a first bipolar transistor, along with a stacked transistor forming a feedback loop, to provide a single-ended logarithmic conversion with improved speed, stability, and noise performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a trans-linear logarithmic detector uses an NPN bipolar transistor with direct collector-to-base connection, then the circuit provides logarithmic detection, but the collector-to-base voltage is not close to zero leading to poor log-linear dynamic range for small input currents
Solution Approach 1:
An operational amplifier is introduced as an intermediary component between the bipolar transistor and ground. The op-amp actively controls the collector-to-base voltage by adjusting its output to maintain virtual ground at the inverting input, thereby forcing the collector-to-base voltage close to zero and improving log-linear dynamic range
Solution Approach 2:
A feedback loop is established where the operational amplifier continuously monitors the voltage at the inverting input and adjusts its output to the emitter of the bipolar transistor. This negative feedback mechanism ensures the collector-to-base voltage remains close to zero, resolving the measurement precision issue
2Measurement precision
If a second copy of logarithmic detector is included driven by reference current to cancel saturation current, then saturation current cancellation is achieved, but device complexity increases
Solution Approach 1:
The patent combines the saturation current cancellation function with the main logarithmic detection circuit by using the same operational amplifier and bipolar transistor for both purposes. The feedback mechanism simultaneously achieves logarithmic conversion and saturation current compensation, reducing the need for separate cancellation circuits
Solution Approach 2:
The operational amplifier serves multiple functions: it acts as the feedback controller for logarithmic conversion, maintains virtual ground, and enables saturation current cancellation through its ability to adjust the emitter voltage. This multi-functionality reduces overall circuit complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution achieves superior speed, stability, and noise performance over a large input current dynamic range, with enhanced robustness against electrostatic discharge (ESD) and improved high-frequency stability.
Implementation Method 1
a trans-linear logarithmic detector that uses the trans-linear properties of a bipolar transistor to provide logarithmic conversion
Implementation Method 2
a first field-effect transistor (FET) having a gate connected to the input terminal
Data Source
AI summary
Apparatus and methods for logarithmic current to voltage conversion are disclosed herein. In certain embodiments, a logarithmic current to voltage converter includes an input terminal that receives an input current, an output terminal that provides a logarithmic output voltage, a first field-effect transistor (FET) having a gate connected to the input terminal, a first bipolar transistor having a collector connected to the input terminal and an emitter connected to the output terminal, and a stacked transistor connected to the output terminal and to the first FET to form a feedback loop. For example, the stacked transistor can correspond to a second bipolar transistor having a collector connected to the output terminal and a base connected to the source of the first FET, or to a second FET having a drain connected to the output terminal and a gate connected to the source of the first FET.