Logarithm Computation Using FMAD and Two-Table Lookup
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Solution Overview
Problem
Existing logarithm processing systems require complex architectures and numerous instructions, often implemented in dedicated hardware, which is inefficient for frequent usage and not optimized for standard programmable processing units.
Innovation Solution
Implementing a reduced instruction set that utilizes two function tables and standard FMAD hardware to normalize and format inputs, allowing for efficient computation of logarithms using existing programmable processing units, such as CPUs or GPUs, by performing two table lookups and combining operations into fewer instructions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a Taylor series approximation is implemented using dedicated hardware with multiple specialized tables, then logarithm computation precision is improved, but device complexity increases
Solution Approach 1:
The patent extracts only the essential components needed for logarithm computation - specifically reducing from multiple specialized tables to just two tables (one for base values and one for derivative values), and removing the square function block. This extraction maintains sufficient precision while significantly reducing device complexity.
Solution Approach 2:
The patent segments the logarithm computation into distinct phases: table lookup for base values, table lookup for derivative values, and sequential multiply-add operations. This segmentation allows each component to be simpler while collectively achieving the desired precision.
2Ease of operation
If a reduced instruction set is used with standard FMAD hardware, then ease of operation is improved, but manufacturing precision may worsen
Solution Approach 1:
The patent changes the parameters of the computation by using compressed formats for storing table values and applying scaling factors during the multiply-add operations. This allows standard FMAD hardware to achieve high precision results despite using a reduced instruction set.
Solution Approach 2:
The patent performs preliminary normalization of the input operand and preliminary lookup of base and derivative values from tables before the actual computation. This preliminary action ensures that the subsequent simplified FMAD operations can achieve high precision without requiring complex instructions.
3Productivity
If dedicated hardware is used for Taylor series approximation, then productivity is improved, but device complexity increases
Solution Approach 1:
The patent makes standard FMAD hardware perform logarithm computation by combining it with simple table lookup operations. This universal approach allows the same hardware to perform both standard floating-point operations and logarithm computations, improving productivity without requiring dedicated specialized hardware.
Data Source
AI summary
Embodiments of logarithm processing systems and methods are disclosed. The system embodiments described herein include two tables corresponding to various base and derivative functions of a logarithm, with logic configured to access the tables and format and normalize the accessed values to evaluate the logarithm using a standard floating point, fused multiply-add (FMAD)unit.