Logarithmic ADC Architecture With Progressive Compression and Calibration
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Solution Overview
Problem
Existing logarithmic analog to digital converters face challenges with temperature dependency, poor loop stability, limited dynamic range, and high current consumption, particularly in switched capacitance pipelined architectures and operational amplifier-based designs.
Innovation Solution
A logarithmic analog to digital converter architecture with progressive compression and a combination of logarithmic and linear conversion methods, utilizing a chain of amplifier stages for logarithmic amplification, comparison with a common reference to generate a thermometric code, and subsequent binary conversion, along with a multiplexing mechanism for enhanced resolution, and calibration to ensure continuous output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If operational amplifier with diode connected architecture is used for logarithmic conversion, then logarithmic conversion capability is achieved, but temperature dependency increases and loop stability deteriorates
Solution Approach 1:
The converter is divided into multiple independent amplifier stages, each handling a specific segment of the input signal range. This segmentation eliminates the need for feedback loops while maintaining logarithmic conversion capability across the entire dynamic range.
Solution Approach 2:
Multiple intermediate amplifier stages are introduced between the input and output, each stage processing a portion of the signal. These intermediary stages enable progressive compression of the signal while avoiding direct feedback connections that cause instability.
2Speed
If switched capacitance pipelined architecture is used, then conversion speed is improved, but device complexity increases and current consumption increases
Solution Approach 1:
The converter uses a single conversion cycle where all amplifier stages process the signal simultaneously rather than through multiple sequential steps. This periodic single-shot approach achieves fast conversion without the complex multi-phase clocking required by pipelined architectures.
3Speed
If switched capacitance pipelined architecture is used, then conversion speed is improved, but current consumption increases
Solution Approach 1:
The signal processing function is segmented across multiple amplifier stages that operate in parallel, eliminating the need for repeated signal processing cycles. This single-pass approach reduces dynamic power consumption while maintaining fast conversion speed.
4Adaptability or versatility
If coarse conversion with thermometric code is used, then wide dynamic range is achieved, but measurement precision of individual bits decreases
Solution Approach 1:
The output code is segmented into coarse bits from the thermometric comparison and fine bits from a second linear conversion stage. This segmentation allows the system to achieve both wide dynamic range through coarse quantization and high precision through fine quantization of the selected signal segment.
Data Source
AI summary
A logarithmic analog to digital conversion method for an analog input signal includes a logarithmic amplification with progressive compression of the input signal delivering a sequence of several secondary analog signals. The trend of the values of at least some of the secondary signals is a function of the values of the analog input signal including regions corresponding to a linear trend of the secondary signals as a function of that of the input signal expressed in a logarithmic scale. The method also includes a comparison of at least some of the secondary signals of the sequence with a common reference signal whose value lies within each of regions, supplying a thermometric code information item, and a generation of a first digital word from the thermometric code information item.