Logarithmic Amplifier for Multivalued Resistance Storage Readout
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Solution Overview
Problem
Existing storage devices using resistance change storage elements like PCM and iPCM elements are not satisfactory for achieving multivalued storage due to wide resistance value distributions, making accurate read operations difficult.
Innovation Solution
A storage device configuration that includes a memory cell with a resistance change storage element, a selector, a word line, a bit line, a logarithmic amplifier circuit to nonlinearly convert current into voltage, and a comparison circuit to compare the voltage with reference voltages, equalizing resistance value distributions and enabling precise multivalued storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If resistance change storage elements (PCM/iPCM) are used for multivalued storage, then storage capacity is improved, but measurement precision deteriorates due to wide resistance value distributions
Solution Approach 1:
The patent applies parameter changes by transforming the read operation from direct resistance measurement to voltage comparison after logarithmic conversion. The logarithmic amplifier converts the wide resistance distribution into a compressed voltage distribution, and the comparison circuit uses multiple reference voltages to precisely identify the stored value level, thereby resolving the measurement precision issue while maintaining multivalued storage capacity
Solution Approach 2:
The patent introduces intermediary components between the resistance change storage element and the read operation: a logarithmic amplifier that converts resistance values to voltage values with compressed distribution, and a comparison circuit with multiple reference voltages that acts as an intermediary decision-making layer. These intermediaries transform the difficult direct resistance measurement into a precise voltage comparison process
2Device complexity
If conventional read operations are used with wide resistance distributions, then device complexity is reduced, but manufacturing precision deteriorates due to difficulty in setting clear read thresholds
Solution Approach 1:
The patent changes the parameter domain from resistance to voltage through logarithmic conversion, and changes the measurement scale from linear to logarithmic. This transformation compresses the wide resistance distribution into a manageable voltage range where precise threshold setting becomes feasible, resolving the manufacturing precision issue without significantly increasing device complexity
Solution Approach 2:
The patent segments the continuous resistance distribution into discrete multivalued storage levels by introducing multiple reference voltages in the comparison circuit. Each reference voltage corresponds to a specific threshold that defines a storage level, creating clear decision boundaries that enable precise manufacturing and reliable read operations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The configuration allows for precise read operations and achieves appropriate multivalued storage by equalizing resistance value distributions and using equalized reference voltages for comparison, enhancing the accuracy and effectiveness of data storage.
Implementation Method 1
a logarithmic amplifier circuit configured to nonlinearly convert a current, which is generated in response to the data signal input to the bit line, into a voltage
Implementation Method 2
a memory cell including a storage component configured to set a plurality of data values in response to a plurality of resistance values
Data Source
AI summary
According to one embodiment, a storage device includes: a memory cell including a storage component to which a plurality of data values are allowed to set in response to a plurality of resistance values of the storage component and a selector connected in series to the storage component; a word line configured to provide a signal to select the memory cell; a bit line configured to receive a data signal from the memory cell; a first conversion circuit configured to nonlinearly convert a first current, generated in response to the data signal input to the bit line, into a first voltage; and a comparison circuit configured to compare the first voltage, converted by the first conversion circuit, with a plurality of reference voltages.