Wide-Band Logarithmic Power Detector With AC-Coupled Offset Blocking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Logarithmic power detectors face issues with DC offset accumulation and tailing effects due to component mismatches and traditional DC offset compensation methods, which affect dynamic response and precision, especially under wide-band and high-frequency input signals.
Innovation Solution
A wide-band logarithmic power detector design incorporating a matching network for AC coupling between cascaded stages, independent DC biasing, and SiGe HBT-based limiting amplifiers with inductive peaking to eliminate DC offset and tailing effects, while maintaining high gain and wide bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional DC offset compensation loops are used to suppress DC offset in limiting amplifier outputs, then DC offset is reduced, but positive feedback occurs at high frequencies causing tailing effects and degraded dynamic response
Solution Approach 1:
The patent extracts and removes the DC offset component from the signal path by introducing a dedicated DC blocking capacitor (C1) in series with the feedback path. This capacitor blocks only the DC component while allowing AC signals to pass, thereby eliminating DC offset accumulation without affecting the dynamic AC signal transmission and avoiding the tailing effect caused by traditional DC feedback loops
Solution Approach 2:
The patent introduces a DC blocking capacitor as an intermediary element in the feedback path. This capacitor acts as a frequency-selective mediator that selectively blocks DC components while permitting AC signal components to pass through, thus resolving the contradiction between DC offset suppression and AC signal integrity at high frequencies
2Adaptability or versatility
If multiple cascaded stages of limiting amplifiers are used to achieve wide dynamic monitoring range, then detection range is expanded, but DC offset accumulates across stages causing saturation and reduced precision
Solution Approach 1:
The patent extracts and removes the harmful DC offset component from each cascaded stage using DC blocking capacitors (C1, C2) placed in the feedback paths. This prevents DC offset accumulation across multiple stages while preserving the beneficial AC signal amplification, thereby maintaining both wide dynamic range and high detection precision
Solution Approach 2:
The patent segments the feedback paths of each cascaded stage and introduces independent DC blocking capacitors in each segment. This segmentation approach allows each stage to independently handle its own DC offset without propagating it to subsequent stages, preventing cumulative DC offset while maintaining the cascaded amplification structure for wide dynamic range
3Stability of the object's composition
If negative feedback loops are used for DC offset compensation, then DC offset is limited, but the loop becomes positive feedback at high frequencies causing signal self-excitation and tailing effects
Solution Approach 1:
The patent introduces a DC blocking capacitor as a frequency-selective intermediary in the feedback path. This capacitor mediates between the DC stability requirement and high-frequency response requirement by blocking DC components (maintaining stability) while allowing AC components to pass (maintaining fast response), thereby eliminating the positive feedback issue at high frequencies
Solution Approach 2:
The patent changes the frequency-dependent parameter of the feedback path by introducing a capacitor, which alters the feedback characteristics based on signal frequency. At DC, the capacitor blocks feedback to prevent offset accumulation, while at high frequencies, the capacitor's impedance decreases allowing AC feedback to maintain stability without causing positive feedback or tailing effects
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively blocks DC offset accumulation and eliminates tailing effects, enhancing dynamic detection precision and consistency across various frequencies, and reduces the need for traditional DC offset compensation loops.
Implementation Method 1
incorporating a matching network for AC coupling between cascaded stages
Implementation Method 2
effectively blocks DC offset accumulation
Implementation Method 3
radio-frequency (RF) input signal is precisely converted into a corresponding logarithmically linear output
Implementation Method 4
a limiting amplifier, which couples in series to the input stage or a preceding cascaded stage and amplifies an output signal
Implementation Method 5
SiGe HBT-based limiting amplifiers with inductive peaking to eliminate DC offset and tailing effects, while maintaining high gain and wide bandwidth
Data Source
AI summary
The present invention discloses embodiments of wide-band logarithmic power detectors for power detection. A wide-band logarithmic power detector may comprise an input matching network for input impedance matching to generate an input stage output signal; an input rectifier rectifying the input stage output signal into an input stage DC output signal; one or more cascaded stages cascaded to the input stage, each cascaded stage comprising a limiting amplifier coupled in series, a matching network coupled in series to the limiting amplifier to receive amplified signal and output a cascaded stage output signal, and a cascaded stage rectifier that rectifies the cascaded stage output signal into a DC output signal; a linear operation circuit performing a linear operation to the input stage DC output signal and each cascaded stage output signal to generate a linear output signal. Implementation of the present invention may solve DC offset and tailing effect in simultaneously.