Logarithmic RF Power Ramp Circuit for Stable EDGE Transmit Control
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Solution Overview
Problem
Existing power ramping techniques in RF circuits for wireless applications, particularly in GSM and EDGE systems, face challenges in achieving cost-effective power control with optimal rise and fall times to avoid information loss and interference, especially when transitioning between standards.
Innovation Solution
A power ramping circuit utilizing a diode connected transistor, voltage to current converter, and a plurality of controlled resistance elements in a current mirror configuration, with a ramp control circuit that sequentially turns off transistors to control the output current, allowing for efficient power ramping in RF transmit circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-speed current-output DAC with single op amp is used to generate ramp profile, then power ramping performance is improved, but implementation cost increases
Solution Approach 1:
The patent divides the power ramping function into multiple segments by using a current-output DAC combined with a logarithmic resistor attenuator network. The attenuator is segmented into multiple resistive elements that can be independently controlled, allowing the ramp profile to be generated in discrete steps rather than requiring a high-speed DAC alone. This segmentation enables cost-effective implementation while maintaining adequate ramping performance.
2Speed
If power amplifier ramps up and down quickly, then rise time is reduced, but instability and ringing occur
Solution Approach 1:
The patent implements dynamic control of the power amplifier ramping by using a logarithmic resistor attenuator with multiple controllable resistive elements. The system dynamically adjusts the attenuation profile during the ramping process, allowing faster rise times while maintaining stability. The logarithmic configuration of the resistors enables smooth, controlled transitions that prevent ringing and instability even at higher ramp speeds.
3Stability of the object's composition
If power amplifier ramps slowly, then stability is improved, but rise time increases and information can be lost
Solution Approach 1:
The patent changes the key parameter of the attenuator network from linear to logarithmic configuration. This parameter change allows the system to achieve both fast rise times and stability. The logarithmic resistor attenuator provides a non-linear attenuation profile that accelerates the initial ramp-up while controlling the later stages, thereby reducing rise time without sacrificing stability or causing information loss.
4Productivity
If EDGE modulation with non-constant amplitude envelope is used, then data rate is increased, but power control difficulty increases
Solution Approach 1:
The patent introduces a logarithmic resistor attenuator as an intermediary component between the DAC and the power amplifier. This intermediary device simplifies the power control complexity by providing a fixed logarithmic attenuation profile that works effectively with the non-constant amplitude envelope of EDGE modulation. The attenuator mediates the relationship between the digital control signal and the analog power output, making the overall system easier to control despite the complex modulation scheme.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a cost-effective and efficient power ramping mechanism that ensures adequate rise time and avoids instability, enabling seamless operation between GSM and EDGE standards while minimizing power consumption.
Implementation Method 1
a voltage to current converter for converting an input base band voltage signal (IN) to a corresponding input current
Implementation Method 2
an input transistor connected in a current mirror configuration with the diode connected transistor the input transistor comprising a drain terminal for providing a data signal comprising an output current
Implementation Method 3
a plurality of controlled resistance elements, coupled between the voltage supply and a gate terminal of the input transistor
Data Source
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AI summary
A power ramping circuit for use in the transmit path of a radio frequency (RF) circuit. The power ramping circuit includes parallel connected transistors used as logarithmic resistor attenuators for adjusting current to a mixer circuit in the transmit path. The parallel connected transistors can be sized differently, and are sequentially turned off to gradually increase the current provided to the mixer circuit. A ramp control circuit controls the parallel connected transistors in response to either an analog signal or a digital signal.