Logic Absorption in Programmable Logic Devices

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Solution Overview

Problem

Programmable logic devices (PLDs) face increased propagation delays and resource wastage due to cascading of configurable resources, leading to reduced clock frequency and inefficient utilization of resources.

Innovation Solution

A logic absorption process is applied to identify and absorb multiplexers into logic gates, reducing cascaded arrangements and optimizing resource usage by reassigning signals, thereby reducing propagation delays and freeing up resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If cascading of configurable resources is used to implement user designs, then functionality can be achieved, but propagation delay increases and clock frequency decreases

Engineering Contradiction:
Improvefunctionality implementationVSAvoidclock frequency
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent merges a logic gate and a multiplexer into a single configurable logic component by absorbing the multiplexer into the logic gate. This combination eliminates the need for cascaded connections between separate logic gate and multiplexer components, thereby reducing propagation delay and increasing clock frequency while maintaining the desired functionality.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If cascading of configurable resources is used, then user designs can be implemented, but configurable resources are wasted

Engineering Contradiction:
Improveuser design implementationVSAvoidconfigurable resources
Core Design Contradiction:
Adaptability or versatilityVSLoss of substance

Solution Approach 1:

By absorbing the multiplexer into the logic gate, the patent consolidates functionality that would otherwise require separate configurable resources. This merging reduces the total number of configurable logic components needed, thereby reducing resource waste while still implementing the required user design functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The absorbed multiplexer functionality is integrated into the logic gate, making the logic gate multi-functional. This universal component can now perform both logic gate operations and multiplexer operations, reducing the need for dedicated multiplexer resources and improving overall resource utilization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If cascading of configurable resources is used, then design flexibility is maintained, but interconnections are wasted

Engineering Contradiction:
Improvedesign flexibilityVSAvoidinterconnections
Core Design Contradiction:
Adaptability or versatilityVSLoss of substance

Solution Approach 1:

By integrating the multiplexer into the logic gate, the patent eliminates the need for interconnections between these two separate components. This reduces the total number of interconnections required in the device while maintaining design flexibility, as the absorbed multiplexer functionality is still accessible through the logic gate interface.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9390210B2Logic absorption techniques for programmable logic devices
Publication Date: 2016.07.12 LATTICE SEMICON CORP
  • US9390210B2 patent drawing
  • US9390210B2 patent drawing
  • US9390210B2 patent drawing

AI summary

Various techniques are provided to efficiently implement user designs in programmable logic devices (PLDs). In one example, a computer-implemented method includes receiving a design identifying operations to be performed by a programmable logic device (PLD). The computer-implemented method also includes synthesizing the design into a plurality of PLD components comprising a first logic block cascaded into a second logic block. In the computer-implemented method, the second logic block implements a multiplexer adapted to selectively pass a first multi-bit input signal received from the first logic block or a second multi-bit input signal. The computer-implemented method also includes further synthesizing the design to absorb the multiplexer into the first logic block.