Logic Analyzer for Detecting Cache Hangs via Tag Pipeline Snapshots

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Solution Overview

Problem

The existing logic for accessing a last-level cache can result in unpredictable hangs and deadlocks, particularly in multi-threaded programs where threads compete for shared resources, leading to starvation conditions that are difficult to predict and resolve.

Innovation Solution

A logic analyzer is coupled to the tag pipeline to record snapshots of transactions and identify patterns indicative of hangs, allowing for the detection of deadlocks, livelocks, and starvation conditions, and providing configuration options to selectively record and respond to such events.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If heuristic-based tagpipe traffic monitoring logic is added to detect hangs, then system reliability is improved, but device complexity increases

Engineering Contradiction:
Improvehang detection capabilityVSAvoidlogic complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The hang detection logic is segmented into distinct functional components: a pattern detector that analyzes arbitration request information, a capture buffer that stores transaction data, and a logic analyzer that processes the captured information. This segmentation allows each component to perform a specific function, improving reliability while managing complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A capture buffer is introduced as an intermediary component between the tag pipeline and the pattern detector. This buffer captures and stores arbitration request information, allowing the pattern detector to analyze traffic patterns without directly interfering with the normal cache operation. The intermediary enables reliable hang detection while isolating the monitoring logic from the critical cache path.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If logic analyzer records snapshots of tag pipeline arbs, then measurement precision is improved, but loss of time increases

Engineering Contradiction:
Improvetraffic pattern detection accuracyVSAvoidsnapshot recording overhead
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The logic analyzer records snapshots of tag pipeline arbitration requests, but only captures the essential information needed for hang detection (arbitration request patterns, transaction types, and queue identifiers). By recording partial information rather than complete transaction details, the system achieves sufficient measurement precision for detecting deadlock and livelock patterns while minimizing the time overhead associated with comprehensive logging.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The capture buffer pre-captures arbitration request information as it passes through the tag pipeline, storing it in a readily accessible format before analysis is needed. This preliminary capture action allows the pattern detector to quickly analyze stored data without causing delays in the critical cache operation path, thus improving measurement precision while reducing time loss.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3066559B1Logic analyzer for detecting hangs
Publication Date: 2019.05.29 VIA ALLIANCE SEMICON CO LTD
  • EP3066559B1 patent drawingFigure 1
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  • EP3066559B1 patent drawingFigure 3

AI summary

A microprocessor comprises a cache including a tag array; a tagpipe that arbitrates access to the tag array; and a logic analyzer for investigating a starvation, livelock, or deadlock condition. The logic analyzer, which comprises read logic coupled to the tagpipe, is configured to record snapshots of transactions to access the tag array.