Logic Analyzer GUI Configuration for Non-Standard Pinouts

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Solution Overview

Problem

Conventional logic analyzers face difficulties in configuring non-standard connection interfaces, requiring cumbersome and error-prone manual modifications or cryptic XML file editing, especially when dealing with custom pinouts.

Innovation Solution

A graphical user interface (GUI) is used to receive user inputs for identifying the target system characteristics, determining the footprint, and mapping signals to logic analyzer connectors, facilitating the generation of a setup file and simplifying the configuration process by visualizing connections and allowing automatic parts of the setup process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If manual modification of setup files or XML files is used to configure non-standard connection interfaces, then the logic analyzer can be configured for custom pinouts, but the process becomes cumbersome and error-prone

Engineering Contradiction:
Improveconfiguration flexibility for non-standard systemsVSAvoidconfiguration complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The patent introduces an intermediary software layer that sits between the user and the complex setup file/XML configuration process. This intermediary provides a simplified user interface that automatically generates the necessary configuration files based on user-friendly inputs, thereby mediating between the need for custom configuration and the desire for ease of use

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system enables self-service configuration by automatically generating setup files and XML configurations based on user inputs through a simplified interface. The automation eliminates the need for users to manually edit complex configuration files, allowing the system to serve itself in generating proper configurations for non-standard connections

Inventive Principle:
Principle #25Self-service

2Ease of operation

If automated setup process is used for standard probing solutions, then the configuration process is simplified, but it does not work for non-standard pinouts without modifications

Engineering Contradiction:
Improvesetup process simplicityVSAvoidapplicability to non-standard systems
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal configuration system that can handle both standard and non-standard probing solutions through a single interface. The system is designed to be multi-functional, automatically detecting whether a standard or custom configuration is needed and adapting its behavior accordingly, thereby making the simplified setup process applicable to a broader range of systems

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system performs preliminary actions by automatically detecting the connection type and pre-configuring the appropriate setup parameters before the user needs to intervene. This preliminary detection and configuration preparation enables the system to handle non-standard pinouts with the same ease as standard configurations

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9342641B1Configuration of logic analyzer using graphical user interface
Publication Date: 2016.05.17 KEYSIGHT TECHNOLOGIES INC
  • US9342641B1 patent drawing
  • US9342641B1 patent drawing
  • US9342641B1 patent drawing

AI summary

A method of configuring a logic analyzer based on user input received through a graphical user interface (GUI) comprises receiving at least one first GUI input identifying at least one characteristic of a target system configured to be connected to the logic analyzer, receiving at least one second GUI input indicating a footprint associated with the target system, and receiving at least one third GUI input indicating a mapping between the footprint and a connector of the logic analyzer.