Signature-Based Logic BIST Diagnosis Using Back-Cone Tracing
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Solution Overview
Problem
Current fault diagnostic methods for Logic Built-In Self Test (LBIST) are cumbersome and require significant additional hardware or multiple test applications, making it difficult to identify failing scan cells and diagnose issues efficiently, especially in complex designs where long processing times are undesirably long.
Innovation Solution
The use of signature-based diagnosis techniques that reduce the initial candidate set by leveraging the relationship between failing scan cells and test signature errors, combined with logic back-cone tracing and compactor equations, to identify potential failure locations without additional hardware, thereby reducing the complexity and time required for diagnosis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional diagnosis methods are used to identify failing scan cells in Logic BIST, then accurate fault location can be achieved, but significant additional hardware and multiple test applications are required
Solution Approach 1:
The patent extracts and utilizes the signature information already present in the Logic BIST test response analyzer (MISR) to perform diagnosis. Instead of adding external hardware, the method takes out and processes the compacted signature data from the existing MISR to identify failing scan cells, thereby achieving accurate fault location without increasing device complexity
Solution Approach 2:
The patent creates a logical copy of the test patterns and signature data for analysis purposes. By copying the signature information and comparing it with expected values, the system can identify failures without requiring additional physical hardware or multiple test applications to the actual circuit
2Measurement precision
If conventional diagnosis methods with bypass patterns are used, then failing scan cells can be identified, but the diagnosis process becomes very cumbersome and time-consuming
Solution Approach 1:
The patent performs preliminary analysis of the signature data immediately after the Logic BIST test completes. By pre-processing the signature information and comparing it with expected values before full diagnosis, the system can quickly identify potential failure locations without requiring time-consuming bypass pattern generation and application
Solution Approach 2:
The patent skips the cumbersome intermediate steps of generating and applying bypass patterns by directly analyzing the existing signature data from the Logic BIST test. This allows the diagnosis process to rush through to the essential outcome of identifying failing cells without unnecessary delays
3Ease of operation
If Logic BIST uses pseudo random patterns for testing, then minimal external test environment support is needed, but fault coverage is lower compared to scan based structural testing
Solution Approach 1:
The patent implements a feedback mechanism where the signature data from Logic BIST testing is analyzed and used to identify failing scan cells. This feedback loop allows the system to maintain the simplicity of pseudo-random pattern generation while adding diagnostic capability that can guide further testing or repair actions
Solution Approach 2:
The patent makes the Logic BIST system multi-functional by enabling it to perform both testing and diagnosis using the same pseudo-random pattern generator and signature analyzer. The MISR serves dual purposes: compacting test responses during testing and providing diagnostic information for identifying failures, eliminating the need for separate test and diagnosis hardware
Data Source
AI summary
Techniques are disclosed for reducing the set of initial candidates in signature based diagnosis methodology. These techniques are based on a unique way of making optimum use of information from logic back-cone tracing along with equations that describe the test response compactor.