Logic Cell Terminator Cells for Voltage Domain Isolation

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Solution Overview

Problem

Existing logic cell designs face significant area overhead due to large design rule check (DRC) requirements for isolating multiple voltage domains, leading to increased overall area in digital designs.

Innovation Solution

The implementation of terminator cells at the boundary or edge of logic cells, which are composed of the same material as the logic cells, reduces the need for multiple deep well or guard ring structures, thereby optimizing area while maintaining isolation between voltage domains.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If deep well ring structures or guard ring structures are used to isolate voltage domains, then isolation between voltage domains is improved, but cell area increases significantly

Engineering Contradiction:
Improveisolation between voltage domainsVSAvoidcell area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The logic cell is divided into multiple voltage domains separated by deep n-well structures. Each voltage domain is independently isolated by segmenting the substrate into distinct regions with different well structures, allowing voltage isolation without requiring large peripheral guard rings.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of using two-dimensional guard ring structures at the periphery, the patent utilizes the vertical dimension by implementing deep n-well structures that extend into the substrate. This vertical isolation approach replaces horizontal expansion with depth-based separation, reducing the footprint area while maintaining effective voltage domain isolation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple deep well or guard ring structures are implemented, then voltage domain isolation is improved, but design complexity increases

Engineering Contradiction:
Improvevoltage domain isolationVSAvoiddesign complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple deep n-well structures are merged into a shared isolation framework that serves multiple voltage domains simultaneously. Instead of implementing separate guard rings around each voltage domain, the patent combines isolation functions into integrated deep well structures that provide collective isolation, reducing the number of individual components and simplifying the overall design.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The deep n-well structures serve multiple functions: they provide voltage domain isolation, act as terminator cells at cell boundaries, and enable multi-domain operation within a single unified structure. This multi-functionality eliminates the need for separate specialized structures for each isolation requirement, thereby reducing design complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Area of stationary object

If terminator cells are placed at boundaries, then area is reduced, but design rule check requirements must be satisfied

Engineering Contradiction:
Improvecell areaVSAvoiddesign rule check compliance
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent modifies the electrical and physical parameters of the terminator cells placed at boundaries, adjusting their doping concentrations, well depths, and geometric dimensions to satisfy design rule check requirements. By optimizing these parameters, the terminator cells achieve both area reduction and compliance with manufacturing specifications.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Standardized terminator cell designs are created and copied to multiple boundary locations throughout the logic cell. These replicated terminator structures ensure consistent design rule compliance across all boundaries while maintaining area efficiency, as the same proven design pattern is reused rather than creating unique structures for each boundary.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20240232496A1Method of optimizing area for logic cells and optimized logic cells
Publication Date: 2024.07.11 SAMSUNG ELECTRONICS CO LTD
  • US20240232496A1 patent drawing
  • US20240232496A1 patent drawing
  • US20240232496A1 patent drawing

AI summary

A method of optimizing area of logic cells includes creating a plurality of terminator cells for the logic cell, wherein the logic cell includes a plurality of cells. The plurality of terminator cells are placed at the boundary or edge of the logic cells.