Semiconductor Package With Vertical Heat Sink and Memory Stacking

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Solution Overview

Problem

Heat generated from logic chips in system-in-package configurations is not efficiently dissipated, leading to performance degradation due to inadequate heat dissipation through the package substrate.

Innovation Solution

A semiconductor package design that includes a heat sink on top of the logic chip, electrically insulated from the package substrate, and a memory chip mounted on the heat sink, allowing for direct heat dissipation to the outside, while maintaining electrical connectivity through conductive wires to the package substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the memory chip is mounted on the package substrate and the logic chip is mounted on the package substrate, then the system-in-package structure is formed, but heat generated from the logic chip cannot be rapidly dissipated

Engineering Contradiction:
Improvesystem-in-package structureVSAvoidheat dissipation
Core Design Contradiction:
Device complexityVSTemperature

Solution Approach 1:

The patent introduces a vertical heat dissipation path by placing a heat sink above the logic chip, transitioning from horizontal heat dissipation through the package substrate to vertical heat dissipation through the heat sink. This dimensional change allows heat to be dissipated in multiple directions simultaneously, resolving the contradiction between maintaining the system-in-package structure and achieving effective heat dissipation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The heat sink acts as an intermediary component between the logic chip and the external environment. It receives heat from the logic chip through thermal conduction and dissipates it to the surrounding air through convection and radiation, effectively mediating the heat transfer process and solving the heat dissipation problem while preserving the system-in-package configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If the second package substrate is disposed on the logic chip, then memory chips can be mounted, but heat from the logic chip remains trapped in the system-in-package

Engineering Contradiction:
Improvememory chip mountingVSAvoidheat retention
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent segments the heat dissipation function from the structural support function by introducing a dedicated heat sink component. The package substrate continues to provide mechanical support and electrical connections for memory chips, while the heat sink separately handles heat dissipation from the logic chip. This segmentation allows both memory chip mounting and effective heat dissipation to coexist without interference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent converts the harmful effect of heat generation from the logic chip into a beneficial heat dissipation mechanism. By strategically placing the heat sink in direct contact with the logic chip's heat-generating regions, the previously problematic heat accumulation is transformed into an controlled heat transfer process, where heat is efficiently conducted to the heat sink and dissipated to the environment, turning a system weakness into a managed thermal management solution.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively dissipates heat from the logic chip, preventing performance degradation and enhancing the overall efficiency of the semiconductor package by rapidly removing heat generated from the logic chip.

Implementation Method 1

a heat sink disposed on an upper surface of the logic chip and configured to dissipate a heat generating from the logic chip

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

configured to dissipate a heat generating from the logic chip

Methodology Applied
Scientific EffectConvection: Convection

Data Source

PatentUS20240290751A1Semiconductor package
Publication Date: 2024.08.29 SAMSUNG ELECTRONICS CO LTD
  • US20240290751A1 patent drawing
  • US20240290751A1 patent drawing
  • US20240290751A1 patent drawing

AI summary

A semiconductor package includes a package substrate, a logic chip on an upper surface of the package substrate and electrically connected to the package substrate, a heat sink contacting an upper surface of the logic chip to dissipate a heat generating from the logic chip, and a memory chip disposed on an upper surface of the heat sink and electrically connected to the package substrate.