Logic Circuit Timing for Delayed Signal Retrieval Without Large Memory
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Solution Overview
Problem
Control systems for gas turbine engines face challenges in efficiently storing electronic signal values for a predetermined period without requiring substantial storage capacity.
Innovation Solution
A logic circuit with a timer and multiple switch assemblies, each comprising a true input gate, false input gate, and output gate, along with first and second delays, is used to provide a signal value after a predetermined time delay, reducing storage capacity needs by utilizing a processing system with software instructions and a processor to execute these cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If electronic signal values are stored for a predetermined period using conventional storage methods, then the signal values can be retrieved after the time delay, but substantial storage capacity is required
Solution Approach 1:
The logic circuit is divided into multiple switch assemblies (first switch assembly, second switch assembly, etc.), each handling a specific time segment of the predetermined period. Each switch assembly contains switches that operate during specific time intervals, segmenting the storage function across multiple discrete units rather than requiring a single large storage capacity.
Solution Approach 2:
The circuit employs periodic switching actions where switches are activated and deactivated in a repeating cycle corresponding to the predetermined time period. The timer generates periodic signals that cause switches to transition between states, allowing the same physical components to serve multiple time periods through periodic reuse rather than requiring separate storage for each time instant.
2Quantity of substance
If a logic circuit with multiple switch assemblies is used to reduce storage capacity, then storage requirements are reduced, but the device complexity increases
Solution Approach 1:
Each switch assembly is designed to perform multiple functions: storing signal values, timing operations, and enabling signal passage during specific intervals. The same switch assembly structure is reused across different time periods and signal paths, allowing a single component design to serve multiple purposes rather than requiring specialized components for each function.
Solution Approach 2:
The circuit combines multiple functions into integrated switch assemblies that merge storage, timing, and signal routing capabilities into single units. The timer and switch assemblies are combined such that the timer controls the switches directly, eliminating the need for separate control circuits and reducing overall system complexity despite the presence of multiple switches.
Data Source
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AI summary
A logic circuit (28) includes a timer (54) and a plurality of switch assemblies (34) in signal communication with the timer (54). Each switch assembly of the plurality of switch assemblies (34) includes a switch (36) including a true input gate (38), a false input gate (40), and an output gate (44), a first delay (46) in signal communication with the output gate (44), and a second delay (48) in signal communication between the output gate (44) and the false input gate (40).