Front-End Logic Circuit Biasing for Positive Depletion Control

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Solution Overview

Problem

Conventional depletion mode transistors require negative control voltages, which complicates their operation and control.

Innovation Solution

A logic circuit using depletion mode transistors controlled by positive control voltages, utilizing bias circuits to provide node voltages that enable convenient operation and reduce the need for additional current sources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If depletion mode transistors are operated using negative control voltages, then the transistors can function as intended, but the control becomes inconvenient and circuit complexity increases

Engineering Contradiction:
Improveconvenience of controlling depletion mode transistorsVSAvoidcircuit complexity due to negative voltage requirements
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent changes the voltage parameter from negative to positive by using a depletion mode transistor with its source terminal connected to a higher potential than its drain terminal. This parameter change allows the transistor to be controlled by positive control voltages instead of negative voltages, improving ease of operation while maintaining the depletion mode transistor's functional characteristics

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent inverts the conventional connection configuration by connecting the source terminal to a higher potential than the drain terminal, which is opposite to the typical arrangement. This inversion enables the depletion mode transistor to operate with positive control voltages, resolving the contradiction between maintaining transistor functionality and improving control convenience

Inventive Principle:
Principle #13The other way round (Inversion)

2Ease of operation

If additional current sources are added to enable positive control voltage operation, then positive control becomes possible, but circuit complexity and cost increase

Engineering Contradiction:
Improvepositive control voltage operationVSAvoidnumber of current sources required
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the requirement for additional current sources by reconfiguring the depletion mode transistor connection. By connecting the source terminal to a higher potential than the drain terminal and using the intrinsic properties of the depletion mode transistor, the circuit achieves positive control voltage operation without needing extra current sourcing components, thus reducing circuit complexity and cost

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The depletion mode transistor serves its own biasing needs through its inherent characteristics when connected with source at higher potential than drain. The transistor's own structure and properties enable it to operate with positive control voltages without requiring external current sources to provide the necessary bias conditions,实现ing self-service functionality

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12494786B2Logic circuit and front end module including the same
Publication Date: 2025.12.09 RICHWAVE TECH CORP
  • US12494786B2 patent drawing
  • US12494786B2 patent drawing
  • US12494786B2 patent drawing

AI summary

A logic circuit includes an input terminal for receiving an input signal, a first output terminal for outputting a first output signal, a second output terminal for outputting a second output signal, and three inverting circuits. A first inverting circuit is coupled between the input terminal and the first output terminal and includes a first depletion mode transistor. The first depletion mode transistor includes a second terminal coupled to a first node. A second inverting circuit is coupled between the first inverting circuit and the first output terminal and includes a second depletion mode transistor. The second depletion mode transistor includes a second terminal coupled to a second node. A third inverting circuit is coupled between the input terminal and the second output terminal. A first node voltage at the first node is lower than a second node voltage at the second node.