Logic Circuit Data Protection via Random Register Injection

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Solution Overview

Problem

Existing methods for protecting sensitive data in microcircuits against attacks like SPA, DPA, and EMA are inadequate as they do not effectively safeguard logic circuits and registers from signature analysis attacks, often requiring additional components and not providing comprehensive protection.

Innovation Solution

A countermeasure method involving the use of multiplexers to alternately introduce random data and data to be processed into input registers of logic circuits, ensuring that transitions and switches depend on random values, thereby obscuring the signature analysis and protecting both registers and logic circuits with minimal additional complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is ciphered at the output of memory or register, then data protection is improved, but the logic circuits and registers remain vulnerable to signature analysis attacks

Engineering Contradiction:
Improvedata protectionVSAvoidsignature analysis attack vulnerability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by introducing random data into registers before the sensitive data processing operation. This preliminary random data insertion changes the initial state of the registers and logic circuits, ensuring that any subsequent signature analysis cannot correlate the observed transitions with the actual sensitive data being processed. The random data is introduced in advance to establish a secure baseline state before the vulnerable operation occurs.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If random data is introduced into registers to change state, then register protection is improved, but additional registers and multiplexers are required

Engineering Contradiction:
Improveregister protectionVSAvoidadditional registers and multiplexers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by making the existing input registers serve dual functions: they both receive normal data for processing and also receive random data for protection purposes. The same register structure is used for both data input and random data injection, eliminating the need for separate dedicated registers. The multiplexer is configured to selectively route either normal data or random data to the register based on operational requirements, achieving multi-functionality with minimal additional components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If existing protection methods are used, then some data protection is achieved, but logic circuits from attacks by signature analysis remain unprotected

Engineering Contradiction:
Improvedata protectionVSAvoidlogic circuit vulnerability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces random data as an intermediary element that mediates between the sensitive data processing operation and the external observation point (signature analysis). This random data acts as a masking layer that decouples the observable transitions in logic circuits from the actual sensitive data operations. The random data flows through the same logic circuits during processing, creating observable transitions that are independent of and mask the transitions caused by sensitive data, thereby protecting the logic circuits from signature analysis.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8958549B2Countermeasure method and device for protecting data circulating in an electronic component
Publication Date: 2015.02.17 STMICROELECTRONICS (ROUSSET) SAS
  • US8958549B2 patent drawing
  • US8958549B2 patent drawing
  • US8958549B2 patent drawing

AI summary

The present disclosure relates to a countermeasure method in an integrated circuit comprising at least one first logic circuit and at least one first input register supplying the first logic circuit with a datum, the method comprising steps of introducing a random datum into each first input register of the first logic circuit and of the first logic circuit reading the random datum in each first input register, then of introducing a datum to be processed into each first input register, and of the first logic circuit processing the datum in each first input register.