Logic Integrated Circuit Switch Cell Array Layout
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Solution Overview
Problem
The existing crossbar circuit designs face challenges in reducing the layout area effectively while maintaining a high degree of freedom in connection patterns, leading to increased chip area and production costs in programmable logic integrated circuits.
Innovation Solution
A logic integrated circuit with a switch cell array configuration that includes serially connected resistance-changing elements and a cell transistor, where adjacent switch cells share a bit line and diffusion layer, allowing for reduced chip area by optimizing the layout of switch cells and wirings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the number of switch cells is reduced, then chip area is reduced, but layout area reduction is limited due to wiring and transistor layout constraints
Solution Approach 1:
Adjacent switch cells share common bit lines and diffusion layers, merging previously separate components into shared resources. This reduces the total number of discrete elements and their associated layout constraints, enabling greater area reduction while maintaining functionality.
Solution Approach 2:
The shared bit lines and diffusion layers serve multiple switch cells simultaneously, giving these components universal functionality. A single bit line or diffusion layer can be used by multiple switch cells, reducing the overall component count and layout complexity.
2Area of stationary object
If switch cells are densely packed to reduce area, then chip area is reduced, but erroneous writing and snake current issues increase
Solution Approach 1:
The bit line is divided into multiple segments, with each segment serving specific switch cells. This segmentation isolates potential snake current paths and prevents erroneous writing in one segment from affecting other segments, improving reliability while maintaining dense packing.
3Adaptability or versatility
If more elements are connected to each wiring to increase connectivity, then connection patterns are improved, but layout area increases
Solution Approach 1:
The circuit layout transitions from a two-dimensional planar arrangement to a three-dimensional structure by stacking wirings across multiple layers. This vertical dimensionality change allows multiple elements to be connected through shared bit lines and diffusion layers without increasing the planar layout area, maintaining high connectivity in a compact footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution achieves a reduced chip area and enhanced reliability by minimizing the number of elements connected to each wiring and allowing individual control of column selection lines, thereby reducing erroneous writing and snake current issues.
Implementation Method 1
The resistance-changing element is able to change a resistance value by applying, to both terminals thereof, a bias voltage in a forward direction or a reverse direction
Implementation Method 2
An ON-state or an OFF-state of the resistance-changing element is held, even when power supply to the programmable logic integrated circuit is stopped
Data Source
AI summary
A logic integrated circuit includes a switch cell array. The switch cell array includes: a plurality of first wirings extending in a first direction; a plurality of second wirings extending in a second direction; a switch cell including a unit element including two serially connected resistance-changing elements, and a cell transistor to be connected to a shared terminal of the two resistance-changing elements; and a bit line to which the shared terminal is connected via the cell transistor. Two of the switch cells adjacent to each other in the first direction are each connected to the different first wiring and second wiring, and share the bit line, and a diffusion layer to which the bit line is connected.