Logic Circuitry Package for Printers Using I2C Leader-Follower Architecture

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing printing systems face challenges in efficiently communicating and managing data between replaceable print apparatus components and the print apparatus, particularly in ensuring accurate sensor information transmission and compatibility across different components, which affects the reliability and longevity of the printing process.

Innovation Solution

The implementation of a logic circuitry package that utilizes the I2C protocol to facilitate communication between the print apparatus and replaceable components, including leader and follower logic circuitry, which monitors and responds to commands, and mimics sensor responses to ensure compatibility and accurate data transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple communication protocols (SPI, Bluetooth, NFC) are supported for component communication, then communication versatility is improved, but device complexity increases

Engineering Contradiction:
Improvecommunication versatilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal I2C communication interface that can work with multiple types of replaceable print apparatus components (ink cartridges, toner cartridges, printheads, etc.). The logic circuitry package provides a standardized communication protocol that simplifies the interface between diverse components and the print apparatus controller, reducing the need for multiple specialized communication circuits while maintaining versatility across different component types.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If sensor information is transmitted from all components, then measurement completeness is improved, but loss of information decreases when components lack sensors

Engineering Contradiction:
Improvesensor information accuracyVSAvoidinformation transmission reliability
Core Design Contradiction:
Measurement precisionVSLoss of information

Solution Approach 1:

The patent implements a leader-follower architecture where a leader component (which has sensors) transmits sensor information to follower components (which may not have sensors). The follower components copy the sensor information received from the leader and transmit it to the controller when addressed. This ensures that complete sensor information is available to the controller even when individual follower components lack their own sensors, preventing information loss while maintaining measurement accuracy.

Inventive Principle:
Principle #26Copying

3Device complexity

If I2C protocol is used for communication, then device complexity is reduced, but communication speed decreases compared to SPI

Engineering Contradiction:
Improvecommunication interface simplicityVSAvoidcommunication speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent acknowledges that I2C is slower than SPI but prioritizes simplicity and compatibility. The system uses I2C for general-purpose communication with all components, and the patent accepts that for high-speed requirements, the system may use alternative approaches or optimize data transmission by batching commands and using the leader-follower copying mechanism to reduce the number of individual high-speed communications needed.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11292261B2Logic circuitry package
Publication Date: 2022.04.05 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US11292261B2 patent drawing
  • US11292261B2 patent drawing
  • US11292261B2 patent drawing

AI summary

A logic circuitry package for a print apparatus component includes an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The at least one logic circuit is configured to receive, via the interface, a command series addressed to a first default address and a second default address, and transmit, via the interface, at least one response in response to at least one command of the command series. The at least one logic circuit is configured to receive, via the interface, an other command series addressed to an other first default address and subsequently, the second default address, and transmit, via the interface, at least one other response in response to at least one other command of the other command series.