Configurable Logic Circuits With Multi-Scale Bitstream Reconfiguration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Configurable integrated circuits face slow configuration and reconfiguration times due to their fine-grained structure, which is inadequate for dynamic pipeline load balancing and data-driven applications, leading to increased costs and inefficiencies.
Innovation Solution
A multi-scale configuration approach using reduced configuration bitstreams to enable fast configuration of coarse-grained aggregate structures, leveraging fewer configuration bits for commonly used functions, allowing for faster time multiplexing and dynamic spatial load balancing while maintaining fine-grained configurability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If fine-grained configuration structure is used to provide flexibility and efficiency, then configurability is improved, but configuration time increases
Solution Approach 1:
The configuration bitstream is segmented into two parts: a compact coarse-grained representation that defines aggregate circuit structures, and a smaller fine-grained representation that configures individual logic elements. This segmentation allows the system to benefit from both coarse-grained speed and fine-grained flexibility without paying the full penalty of fine-grained configuration time.
Solution Approach 2:
The patent implements a nested configuration structure where coarse-grained aggregate structures contain or govern fine-grained logic element configurations. The coarse-grained representation acts as a container that organizes and manages multiple fine-grained configurations, enabling hierarchical control that reduces overall configuration time while maintaining detailed configurability.
2Adaptability or versatility
If full fine-grained configuration bitstream is used, then complete configurability is achieved, but configuration time and resource usage increase
Solution Approach 1:
The system applies partial configuration action by using coarse-grained representations for aggregate structures that don't require full fine-grained specification. This partial approach is sufficient for many applications where complete fine-grained control is not necessary, thereby achieving acceptable configurability with significantly reduced configuration time and resources.
Solution Approach 2:
The patent changes the configuration parameter representation from full fine-grained bit patterns to compact coarse-grained representations. This parameter transformation reduces the amount of configuration data needed while maintaining the ability to achieve desired circuit configurations, thereby improving configuration speed without sacrificing essential adaptability.
3Productivity
If coarse-grained configuration is used to reduce configuration time, then configuration speed is improved, but fine-grained configurability is reduced
Solution Approach 1:
The configuration system is segmented into two operational modes: coarse-grained mode for rapid configuration of aggregate structures and fine-grained mode for detailed logic element configuration. This segmentation allows the system to select the appropriate granularity level based on the specific configuration needs, achieving both speed and flexibility.
Solution Approach 2:
The patent implements dynamic configurability where the system can transition between coarse-grained and fine-grained configuration modes as needed. This dynamic approach allows coarse-grained representations to provide fast initial configuration while enabling fine-grained adjustments when detailed customization is required, thus maintaining both speed and adaptability.
Data Source
AI summary
An integrated circuit includes configurable logic circuit blocks that are configurable with a first configuration bitstream according to a coarse grained configuration. The coarse grained configuration implements an aggregate circuit structure of the configurable logic circuit blocks. The configurable logic circuit blocks are configurable with a second configuration bitstream according to a fine grained configuration. A total number of the first and the second configuration bits is fewer than a single fine grained configuration bitstream.


