Logic Device Defect Tolerance via Scheduler Segmentation
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Solution Overview
Problem
Traditional semiconductor manufacturing techniques result in defects in logic devices like SIMDs, which can render devices inoperable, and existing methods are inefficient for testing and compensating for these defects, especially in critical processing functions.
Innovation Solution
An apparatus comprising a scheduler and logic devices with defect indicators, which determines defective units and facilitates defect tolerance through redundant logic areas, test methodologies, and e-fuse mechanisms to identify and compensate for defects, allowing for the segregation and redistribution of workload across operational units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional semiconductor manufacturing techniques are used, then chips are produced at standard manufacturing rates, but a predictable percentage of chips will have defects that can render devices inoperable
Solution Approach 1:
The device is divided into multiple processing modules, with critical functions segmented into separately testable units. This allows defects to be isolated to specific modules rather than rendering the entire device inoperable, enabling selective activation of functional modules based on defect locations.
Solution Approach 2:
Defect testing and identification are performed during or immediately after manufacturing, before the device is deployed. This preliminary detection allows for proactive compensation strategies to be implemented, such as activating redundant modules or reconfiguring the device to bypass defective areas.
2Reliability
If extensive testing is performed to identify all defects, then device reliability can be ensured, but manufacturing time and cost increase significantly
Solution Approach 1:
Testing resources are concentrated on critical processing modules rather than uniformly testing all device components. The testing strategy prioritizes areas that would render the device inoperable if defective, allowing for faster identification of show-stopping defects while reducing overall testing time.
Solution Approach 2:
The system uses inexpensive, easily implementable defect indicators such as e-fuses that can be quickly tested and replaced if needed. These simple testing mechanisms provide rapid defect identification without requiring complex, time-consuming test equipment or procedures.
3Reliability
If redundant sub-modules are added to SIMD devices, then defect tolerance is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The device architecture includes dynamically reconfigurable module activation capabilities. Based on defect test results, the system can dynamically activate or deactivate specific processing modules, allowing the device to adapt its operational configuration to maximize performance while minimizing the impact of defects, without requiring permanent redundant hardware.
Solution Approach 2:
Processing modules are designed with universal interfaces and standardized functions, allowing any functional module to potentially replace another in different operational scenarios. This multi-functionality reduces the need for dedicated redundant modules, as existing modules can be repurposed to compensate for defects in different configurations.
4Productivity
If devices with defects are allowed to operate at degraded performance, then manufacturing yield is improved, but security and reliability concerns arise
Solution Approach 1:
The system incorporates continuous monitoring and feedback mechanisms that track the operational status of processing modules. When defects are detected or performance degradation is observed, the system provides feedback to control logic that can automatically adjust operational parameters, activate compensation strategies, or flag the device for removal from service, thereby maintaining security while maximizing yield.
Solution Approach 2:
Physical security measures such as e-fuses and defect indicators are used to permanently disable or flag defective devices, replacing the need for complex software-based security patches or manual inspection processes. This substitution provides a reliable, automated mechanism for ensuring that devices with excessive defects do not compromise security.
Data Source
AI summary
Provided is an apparatus including a scheduler and a plurality of logic devices coupled to the scheduler, each including a defect indicator. The scheduler determines whether one or more of the logic devices is defective based upon its respective defect indicator. The scheduler intentionally omits sending workloads to the disabled logic units, and thus enables the device to be functional albeit at a lower performance or in a differently performing product.


