Logic Die Feedback Testing Through TSVs for Short Circuit Detection

Solution Overview

Problem

The increasing possibility of short circuits between through silicon vias (TSVs) in semiconductor devices, particularly in high bandwidth memory (HBM) systems, poses a challenge in ensuring the reliability and yield of semiconductor devices before assembly with memory dies.

Innovation Solution

A logic die with a test circuit and interface circuit configuration that allows for feedback testing through different paths, including a write path, read path, and TSV input/output circuit, enabling separate test modes to identify defects before assembly with memory dies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the semiconductor process is refined to increase integration density, then the functionality and performance of the semiconductor device are improved, but the possibility of short circuits between TSVs increases

Engineering Contradiction:

Improveintegration densityVSAvoidshort circuit risk

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent performs feedback testing on the logic die before assembly with memory dies to detect potential short circuits between TSVs in advance. By conducting the test preliminarily on individual logic dies, defective dies can be identified and discarded before they are assembled into the final HBM device, thus preventing reliability issues while maintaining high integration density.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The logic die performs self-testing through feedback testing using its own internal test circuit and interface circuit. The logic die generates test data, transmits it through TSVs to memory dies, and receives feedback data to detect short circuits autonomously without requiring external testing equipment, enabling self-verification of TSV integrity.

Inventive Principle:

Principle #25Self-service

2Reliability

If feedback testing is performed on logic dies before assembly, then the yield of semiconductor devices is improved, but the testing complexity and time are increased

Engineering Contradiction:

Improvedevice yieldVSAvoidtesting complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The logic die performs self-testing through feedback testing using its own internal test circuit and interface circuit. The logic die generates test data, transmits it through TSVs to memory dies, and receives feedback data to detect short circuits autonomously without requiring external testing equipment, enabling self-verification of TSV integrity.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The interface circuit serves multiple functions: it acts as both the normal data transmission interface between logic die and memory die, and as the test signal transmission path for feedback testing. This multi-functionality reduces the need for separate dedicated test circuits and simplifies the overall testing system.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Measurement precision

If feedback testing is performed through TSVs, then the detection precision of short circuits is improved, but the testing time and production efficiency are reduced

Engineering Contradiction:

Improveshort circuit detection precisionVSAvoidtesting time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs feedback testing on the logic die before assembly with memory dies to detect potential short circuits between TSVs in advance. By conducting the test preliminarily on individual logic dies, defective dies can be identified and discarded before they are assembled into the final HBM device, thus preventing reliability issues while maintaining high integration density.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The feedback testing is performed selectively on individual logic dies that are suspected or required to be tested, rather than testing every single die without exception. This partial application of testing reduces overall testing time while maintaining detection precision for critical cases.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS20250264529A1Logic die, semiconductor device including the same, and method of feedback testing of the same

Publication Date: 2025.08.21 SAMSUNG ELECTRONICS CO LTD

AI summary

Provided are a logic die performing a feedback test operation, a semiconductor device including a logic die, and a feedback test operation on the logic die. The logic die includes a test circuit configured to generate test data for a feedback test operation, through silicon vias configured to communicate with a memory die, and an interface circuit connected between the test circuit and the through silicon vias. The interface circuit includes a TSV input/output circuit connected to one through silicon via, a write path, and a read path. In a first test mode for the logic die, the test data is fed back to the test circuit via the write path and the read path, and in a second test mode for the logic die, the test data is fed back to the test circuit via the write path, the TSV input/output circuit, the through silicon via, and the read path.