Programmable Logic Fabric Cache Layout for Rapid Reconfiguration

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Programmable logic devices require significant time for partial reconfiguration, which is not sufficient for tasks that demand calculations on the order of microseconds or faster, limiting their performance in applications like machine learning and video processing.

Innovation Solution

Implementing a programmable logic device with sector-aligned memory that caches configuration programs locally, allowing for rapid reconfiguration by reducing the physical distance and transactions between memory and programmable logic fabric, and enabling pipelining for faster data transfers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional configuration memory and programmable logic fabric are used, then the device can be programmed with circuit designs, but the partial reconfiguration time is too long (milliseconds) for high-speed applications

Engineering Contradiction:

Improvereconfiguration speedVSAvoidconfiguration time

Core Design Contradiction:

SpeedVSLoss of time

Solution Approach 1:

The configuration memory is divided into multiple cache memory units, each associated with a specific sector of the programmable logic fabric. This segmentation allows parallel configuration of different sectors, significantly reducing overall reconfiguration time compared to sequential configuration from a single centralized memory.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a spatial dimension to configuration by distributing cache memory units across different physical locations adjacent to their respective logic fabric sectors. This spatial distribution enables simultaneous configuration operations across multiple sectors, transforming the configuration process from a serial time-based operation to a parallel space-based operation.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If configuration data is stored in centralized configuration memory, then the device can be programmed, but the physical distance and number of transactions between memory and logic fabric increase configuration time

Engineering Contradiction:

Improveconfiguration throughputVSAvoidphysical distance for data transfer

Core Design Contradiction:

ProductivityVSLength of moving object

Solution Approach 1:

Each sector of the programmable logic fabric has its own dedicated cache memory unit located locally adjacent to it. This local placement eliminates long data transfer distances and reduces the number of transactions required, as configuration data can be directly loaded from the nearby cache memory into the configuration memory of each sector without traversing the entire device.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent extracts the configuration storage function from a single centralized memory and distributes it to multiple local cache memory units positioned next to their respective logic fabric sectors. This extraction of the storage function to local locations eliminates the bottleneck of centralized memory access and enables faster, localized configuration operations.

Inventive Principle:

Principle #2Taking out (Extraction)

3Adaptability or versatility

If partial reconfiguration is implemented quickly, then the device can adapt to different tasks, but it still cannot achieve microsecond-scale performance required for certain high-speed applications

Engineering Contradiction:

Improvetask adaptabilityVSAvoidreconfiguration time

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

Configuration data is pre-loaded into local cache memory units before being needed by the logic fabric sectors. This preliminary action ensures that when reconfiguration is required, the data is already in place and can be immediately transferred to the configuration memory, achieving microsecond-scale reconfiguration times while maintaining full adaptability to different computational tasks.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent enables continuous operation by allowing configuration data to be prepared in advance in cache memory while the logic fabric executes current tasks. This continuity ensures that reconfiguration can occur without interrupting the computational workflow, maintaining both adaptability and high-speed performance.

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS11334263B2Configuration or data caching for programmable logic device

Publication Date: 2022.05.17 ALTERA CORP

AI summary

An integrated circuit device may cache configuration data to enable rapid configuration from fabric cache memory. The integrated circuit device may include programmable logic fabric having configuration memory and programmable logic elements controlled by the configuration memory, and sector-aligned memory apart from the programmable logic fabric. A first sector of the configuration memory may be programmed with first configuration data. The sector-aligned memory may include a first sector of sector-aligned memory that may cache the first configuration data while the configuration memory is programmed with the first configuration data a first time. A second sector of sector-aligned memory may cache second configuration data for a second sector of the configuration memory in parallel while the first sector of sector-aligned memory caches the first configuration data for the first sector of the configuration memory.