Programmable Logic Fabric Partitioning for Fast Persona Switching

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Solution Overview

Problem

Partial reconfiguration in programmable logic devices introduces latency, which is undesirable for applications that frequently switch between different circuit designs, as it requires significant programming time even when switching between personas.

Innovation Solution

A larger integrated circuit device with a larger programmable logic fabric emulates a virtual smaller integrated circuit device, allowing multiple personas to be programmed in separate partitions, enabling faster switching between them by leveraging the additional resources of the larger device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If partial reconfiguration is used to switch personas in a programmable logic device, then the device can support multiple circuit designs, but switching between personas introduces latency due to programming time

Engineering Contradiction:
Improvepersona switching capabilityVSAvoidpersona switching latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The programmable logic fabric is divided into multiple partitions, with each partition capable of holding a different persona. This segmentation allows the system to prepare multiple personas simultaneously in different partitions, enabling fast switching by simply changing which partition is active, rather than reprogramming the entire device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple personas are pre-programmed into different partitions of the programmable logic fabric before runtime. This preliminary action allows the system to have multiple circuit designs ready and waiting, so when a persona switch is needed, the system can immediately activate the pre-prepared persona without undergoing time-consuming reprogramming.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If a smaller integrated circuit device is used, then the device size is reduced, but partial reconfiguration latency remains significant

Engineering Contradiction:
Improvedevice areaVSAvoidpartial reconfiguration time
Core Design Contradiction:
Area of stationary objectVSLoss of time

Solution Approach 1:

A virtual smaller integrated circuit device is created by mapping its logic elements to a subset of partitions in a larger physical device. This copying approach allows the smaller device to benefit from the larger device's resources, including the ability to hold multiple pre-programmed personas in different partitions, thereby achieving fast persona switching without the physical constraints of a small device.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The virtual smaller integrated circuit device is nested within the larger integrated circuit device. The smaller device's logic elements are mapped to specific partitions of the larger device's programmable logic fabric, allowing the smaller device to leverage the larger device's capacity to store multiple pre-programmed personas, thus achieving fast switching performance.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Speed

If multiple personas are programmed in separate partitions of a larger device, then persona switching speed is improved, but device complexity increases

Engineering Contradiction:
Improvepersona switching speedVSAvoidpartition management complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The larger integrated circuit device serves multiple functions: it acts as the physical hardware platform while simultaneously providing the programmable logic fabric for multiple partitions. Each partition can hold a different persona, and the device can dynamically switch between them by activating different partitions, thus achieving fast switching without requiring separate hardware for each persona.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9503094B1Programmable logic device virtualization
Publication Date: 2016.11.22 ALTERA CORP
  • US9503094B1 patent drawing
  • US9503094B1 patent drawing
  • US9503094B1 patent drawing

AI summary

A device includes a programmable logic fabric. The programmable logic fabric includes a first area, wherein a first persona is configured to be programmed in the first area. The programmable logic fabric also includes a second area, wherein a second persona is configured to be programmed in the second area in a second persona programming time. The device is configured to be controlled by a host to switch from running the first persona to running the second persona in a time less than the second persona programming time.