Microsector Logic Fabric With Scan Registers for Write-Only Reconfiguration
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Solution Overview
Problem
Programmable logic devices face inefficiencies due to large sector-based registers that lead to over-allocation of resources and longer configuration times, particularly in partial reconfigurations, as they require read-modify-write operations for each sector, which is time-consuming and resource-intensive.
Innovation Solution
Implementing a microsector infrastructure with smaller data registers and rearranged interconnections to enable finer granularity in resource allocation, allowing for write-only partial reconfigurations and reducing the number of scan registers, thereby improving configuration efficiency and reducing configuration times by a factor of five or six.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If large sector-based registers are used in logic fabric, then resource allocation is simplified, but resource over-allocation occurs and configuration time increases
Solution Approach 1:
The patent divides large sector-based registers into smaller microsector registers. Each microsector (e.g., 4x4 ALEs) has its own small register (e.g., 16 bits), allowing fine-grained resource allocation. This segmentation enables partial reconfiguration of only the necessary microsectors rather than entire large sectors, significantly reducing configuration time and resource over-allocation while maintaining allocation simplicity through the structured register architecture.
2Ease of manufacture
If large sector-based registers are used in logic fabric, then resource allocation is simplified, but the number of scan registers increases
Solution Approach 1:
The patent segments the scan register functionality into distributed small registers within each microsector rather than using large centralized scan registers. Each microsector contains its own small register that can be scanned independently, reducing the total number of scan registers needed while maintaining allocation simplicity through the systematic microsector organization.
3Manufacturing precision
If read-modify-write operations are performed for each sector during partial reconfiguration, then configuration accuracy is maintained, but configuration time increases significantly
Solution Approach 1:
The patent enables independent configuration of individual microsectors through their dedicated small registers, eliminating the need for read-modify-write operations on large sectors. Each microsector can be configured directly by writing to its specific register, maintaining configuration accuracy while dramatically reducing reconfiguration time since only the necessary microsectors are updated rather than entire sectors.
Solution Approach 2:
The patent prepares configuration data in advance for specific microsectors and loads it directly into their registers without requiring read-modify-write sequences. This preliminary preparation of configuration data for targeted microsectors allows direct writing, maintaining accuracy while reducing the time-consuming read-modify-write operations that would be required with large sector-based registers.
Data Source
AI summary
Systems and methods described herein may relate to providing a dynamically configurable circuitry able to be programed using a microsector granularity. Furthermore, selective partial reconfiguration operations may be performed use write operations to write a new configuration over existing configurations to selectively reprogram a portion of programmable logic. A quasi-delay insensitive (QDI) shift register and/or control circuitry receiving data and commands from an access register disposed between portions of programmable logic may enable at least some of the operations described.