Logic Gate EMI Reduction via Fixed Current and Voltage Clamping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current electronic products face challenges in reducing electromagnetic interference (EMI) in logic gates without increasing the required area, as existing solutions like long channel transistors or current-limited resistors either raise costs or complicate processing.
Innovation Solution
A logic device incorporating a current mirror circuit, a digital logic gate, a voltage-limited circuit, and a current-limited circuit, which provides a fixed current and voltage to the digital logic gate, reducing transient currents and output voltage swings, thereby minimizing EMI without increasing the logic gate's area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If current-limited resistors are added to reduce transient current, then EMI is reduced, but the area required for the logic gate increases
Solution Approach 1:
The patent changes the electrical parameters by introducing fixed current and voltage supply mechanisms. The current mirror circuit provides a fixed current to the logic gate, and the voltage-limited circuit clamps the voltage to a fixed level, thereby controlling the transient current without requiring additional resistive elements that would increase area.
Solution Approach 2:
The patent introduces intermediary circuits (current mirror circuit and voltage-limited circuit) that act as mediators between the power supply and the logic gate. These intermediary circuits regulate the current and voltage delivered to the logic gate, reducing transient current and EMI without requiring area-increasing resistors within the logic gate itself.
2Object-generated harmful factors
If long channel transistors are used to reduce transient current, then EMI is reduced, but the area and processing complexity increase
Solution Approach 1:
Instead of changing the physical dimension (channel length) of transistors, the patent changes the electrical parameters by providing fixed current and voltage supplies. This approach achieves transient current reduction through electrical control rather than geometric modification, avoiding increased processing complexity.
3Object-generated harmful factors
If long channel transistors are used to reduce transient current, then EMI is reduced, but the area required for the logic gate increases
Solution Approach 1:
The patent changes the electrical parameters (current and voltage) rather than the physical dimensions. By providing fixed current through the current mirror circuit and limiting voltage through the voltage-limited circuit, transient current is reduced without increasing transistor channel length, thereby avoiding area increase.
Solution Approach 2:
The patent uses intermediary circuits (current mirror and voltage-limited circuits) to control the electrical parameters supplied to the logic gate. These mediators reduce transient current through electrical regulation rather than requiring larger transistor dimensions, thus preventing area increase.
Data Source
AI summary
A logic device with low electromagnetic interference. The logic device includes a digital logic gate, a voltage-limited circuit and a current-limited circuit. The digital logic gate provides a corresponding digital logic function. The voltage-limited circuit is connected to the digital logic gate in order to provide a fixed voltage to the digital logic gate to thus reduce an output voltage swing of the digital logic gate. The current-limited circuit is connected to the digital logic gate in order to provide a fixed current to the digital logic gate to thus reduce a transient current of the digital logic gate. Accordingly, an electromagnetic interface (EMI) caused by switching of the digital logic gate is reduced with the reduced output voltage swing and transient current.