Logic Gate Sense Elements for Burst Mode Memory Bandwidth
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Solution Overview
Problem
Current memory systems are energy inefficient and lack sufficient bandwidth to meet the demands of fast processing cores, particularly in machine learning and AI applications, where rapid access to large data chunks is required.
Innovation Solution
The implementation of a memory system that uses logic gates as sense elements instead of traditional sense amplifiers, allowing for simultaneous assertion of multiple wordlines and shared column circuitry to enable burst mode read operations, which increases bandwidth and reduces energy consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional sense amplifiers are used in memory systems, then reliable data sensing is achieved, but energy consumption increases and bandwidth is insufficient
Solution Approach 1:
The patent removes the traditional sense amplifier component from the memory system and replaces it with logic gates. This extraction of the sense amplifier function leads to reduced energy consumption while maintaining data sensing capability through the alternative logic gate-based sensing mechanism
Solution Approach 2:
The logic gates serve multiple functions: they act as sense elements for data reading, enable burst mode operations, and facilitate simultaneous wordline assertions. This multi-functionality allows the system to achieve both low energy consumption and high bandwidth without requiring separate dedicated components for each function
2Loss of energy
If traditional sense amplifiers are used, then data sensing is reliable, but energy per bit increases
Solution Approach 1:
The patent changes the operational parameters of the sensing mechanism by using logic gates instead of sense amplifiers. This parameter change in the sensing architecture enables lower energy per bit consumption while maintaining sensing reliability through the inherent properties of logic gate operations and their deterministic switching characteristics
3Productivity
If burst mode read operations are implemented with multiple wordlines, then bandwidth increases, but device complexity increases
Solution Approach 1:
The patent merges the control functions for multiple wordlines into a unified burst mode operation. By combining the assertion of multiple wordlines into a single coordinated operation managed by the logic gate sense elements, the system achieves high bandwidth while managing control complexity through integration rather than separate independent controls
Data Source
AI summary
Memory systems with burst mode having logic gates as sense elements and related methods are provided. A memory system comprises a memory array including a first set of memory cells coupled to a first wordline, a second set of memory cells coupled to a second wordline, and a plurality of sense elements, not including any sense amplifiers. The control unit is configured to generate control signals for: in response to a burst mode read request, simultaneously: (1) asserting a first wordline signal on the first wordline coupled to each of a plurality of first set of bitlines, and (2) asserting a second wordline signal on the second wordline coupled to each of a plurality of second set of bitlines, and as part of a burst, outputting data corresponding to a subset of each of the first set of memory cells and the second set of memory cells.