Interposer Routing Between Logic Blocks and Interfaces to Avoid Bus Crossing
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Solution Overview
Problem
The increasing physical limits of transistor size in semiconductor processes at 3 nm or 2 nm lead to higher costs and complexity due to line crossing issues when dies with the same function are packaged together, affecting chip logic and board design.
Innovation Solution
An integrated apparatus using an interposer to connect switching and line logic blocks of a die to different interfaces, reducing area, cost, and power consumption by employing a redistribution layer and active components to facilitate interface exchange.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If dies are packaged together using rotation and symmetrization, then chip functionality is achieved, but line crossing occurs causing increased complexity
Solution Approach 1:
The patent introduces an interposer as an intermediary component between the die and the board. The interposer includes a first interface connected to the die and a second interface connected to the board, with routing logic that can be flexibly configured. This intermediary structure eliminates the need for direct connections that would require rotation and symmetrization, thereby avoiding line crossing issues while maintaining chip functionality and reducing overall system complexity.
2Productivity
If switching logic block and line logic block are directly connected to interfaces, then data exchange is efficient, but bus crossing occurs
Solution Approach 1:
The patent resolves bus crossing by transitioning from a planar two-dimensional routing approach to a three-dimensional architecture. The interposer is positioned in a separate layer above or below the die, allowing routing connections to extend vertically through the interposer structure. This dimensional change enables the switching logic block and line logic block to connect to interfaces without their signal paths crossing each other in the horizontal plane, thus maintaining data exchange efficiency while eliminating bus crossing complexity.
3Adaptability or versatility
If interface exchange is implemented within the die, then connectivity flexibility is achieved, but area and power consumption increase
Solution Approach 1:
The patent extracts the interface exchange functionality from the die itself and relocates it to the interposer. The interposer contains the routing logic and interface connectivity mechanisms separately from the compute logic in the die. This extraction reduces the area and power consumption requirements within the die, as the interposer can use different fabrication processes and materials optimized for routing rather than active logic operations. The connectivity flexibility is maintained through the interposer's configurable routing capabilities.
Data Source
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AI summary
This application provides an integrated apparatus, a communication chip, and a communication device, and relates to the field of electronic technologies, to resolve a problem of line crossing existing when an interface of a die is connected to a corresponding side of a board. The integrated apparatus includes an interposer and a die located on the interposer, where the die includes a switching logic block, a line logic block, a first interface, and a second interface; the switching logic block is configured to control data exchange of the die; the line logic block is configured to control data receiving and sending of the die; the switching logic block is connected to the first interface via the interposer; and the line logic block is connected to the second interface via the interposer.