Bidirectional Logic Isolation Multiplexer for Open-Drain Voltage Translation
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Solution Overview
Problem
Existing integrated circuits face challenges in bidirectional communication and voltage level translation for open-drain circuitry, particularly in scenarios where a single controller needs to communicate with multiple peripheral devices with different logic high voltage levels, requiring efficient logic isolation and multiplexing capabilities.
Innovation Solution
A logic isolation circuit with buffer and latch configurations allows for bidirectional communication between a host integrated circuit and multiple peripheral integrated circuits, featuring voltage transferable and non-transferable states, enabling level shifting and multiplexing without the need for separate controllers for each peripheral device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If voltage level translators are used for open-drain circuitry to enable communication between different logic voltage levels, then voltage level translation capability is improved, but device complexity increases due to requiring separate controllers for each peripheral device
Solution Approach 1:
The patent combines multiple voltage level translation channels into a single integrated device. The logic isolation circuit includes multiple buffer circuits (first buffer circuit, second buffer circuit) that can handle different voltage levels simultaneously, allowing one device to replace what would traditionally require multiple separate controllers for different peripheral devices with different voltage requirements.
Solution Approach 2:
The logic isolation circuit is designed with universal functionality to handle multiple voltage level translations and communication protocols through a single device. The circuit can adapt to different peripheral devices with different logic voltage levels by switching between different buffer circuit configurations, making one device serve multiple functions that previously required separate dedicated controllers.
2Reliability
If separate controllers are used for each peripheral device to manage voltage level differences, then communication reliability is improved, but device complexity and system resource usage increase
Solution Approach 1:
Multiple communication channels are merged into a single logic isolation circuit. The device includes first and second buffer circuits that can independently handle different voltage levels, allowing reliable communication with multiple peripheral devices through one integrated controller rather than requiring separate controllers for each device.
Solution Approach 2:
The logic isolation circuit acts as an intermediary between the host device and multiple peripheral devices with different voltage levels. The buffer circuits serve as intermediate stages that translate and isolate voltage levels, enabling reliable communication without requiring the host to directly manage each peripheral's specific voltage requirements through separate controllers.
3Device complexity
If bidirectional multiplexing is implemented to allow single controller communication with multiple peripherals, then device complexity is reduced, but logic isolation capability may be compromised
Solution Approach 1:
The patent merges bidirectional multiplexing functionality with logic isolation in a single circuit. The first and second buffer circuits are configured to provide isolation while enabling bidirectional communication, achieving both complexity reduction and maintained isolation capability through integrated design rather than separate components.
Solution Approach 2:
Different portions of the circuit provide different functions: the buffer circuits provide voltage translation and isolation, while the latch circuits provide state management and multiplexing control. Each component has specialized local quality optimized for its specific function, allowing the overall system to achieve both isolation and multiplexing through coordinated local optimizations.
4Adaptability or versatility
If buffer circuits are configured for voltage transferable and non-transferable states to enable multiplexing, then adaptability for different voltage levels is improved, but circuit complexity increases
Solution Approach 1:
The patent combines buffer circuits with latch circuits in an integrated configuration. The buffer circuits provide voltage transferable and non-transferable states, while the latch circuits manage the state transitions and multiplexing logic, merging what could be separate components into a unified circuit structure that reduces overall complexity.
Solution Approach 2:
The buffer circuits are designed with dynamic state switching capability, transitioning between voltage transferable and non-transferable states as needed for different communication scenarios. This dynamic configuration allows the circuit to adapt its behavior based on the operational requirements without requiring multiple static circuit configurations.
Data Source
AI summary
Voltage level translation for open-drain circuitry is described. A logic isolation circuit includes a first buffer circuit configured for being switched between a first voltage transferable state and a first voltage non-transferable state. A first latch circuit is configured for being switched between a first reset state and a first non-reset state, the first reset state for setting the first latch circuit to a first reset condition. A second buffer circuit and second latch circuit are configured like the first buffer circuit and the first latch circuit. First and second input/output nodes are coupled to receive first and second logic level voltages, respectively. The first logic level voltage and the second logic level voltage are both for a same logic state, but the second logic level voltage is significantly greater than the first logic level voltage.