Logic NVM Firmware Storage for Updatable Flash Memory Access

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Solution Overview

Problem

Flash memory devices face limitations in firmware updates due to inflexibility and high costs associated with ROM, CAM, and SRAM, necessitating a more flexible and cost-effective solution for storing and updating firmware instructions.

Innovation Solution

Incorporation of embedded logic non-volatile memory (NVM) cells that are post-silicon programmable, replacing instruction ROM and SRAM, allowing for simplified updates to firmware instructions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If ROM, CAM, or SRAM is used to store firmware instructions, then the memory can store executable instructions, but the flexibility and capacity for updating firmware is limited

Engineering Contradiction:

Improveflexibility for updating firmwareVSAvoidfirmware update capacity

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent changes the fundamental parameter of memory volatility by using non-volatile memory (NVM) instead of volatile memory (SRAM, CAM) or read-only memory (ROM). This allows the memory to retain firmware instructions without power while enabling post-silicon programming and updates, thus improving flexibility and update capacity simultaneously.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The invention introduces dynamic reconfigurability to the firmware storage by implementing logic NVM cells that can be programmed after silicon fabrication. This dynamic capability allows firmware to be updated, modified, or reconfigured in the field, transforming static firmware storage into a dynamic system that adapts to changing requirements.

Inventive Principle:

Principle #15Dynamics

2Adaptability or versatility

If SRAM is used to replace instruction ROM, then update capability improves, but cost increases and area increases

Engineering Contradiction:

Improvefirmware update capabilityVSAvoidmemory cell area

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent employs NVM cells that combine the update capability of volatile memory with the density and area efficiency of non-volatile memory. These cells provide a cost-effective alternative to SRAM by achieving similar functionality (programmability and updates) with significantly smaller area and lower cost, effectively replacing expensive SRAM implementations.

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

3Use of energy by moving object

If traditional flash memory is used, then high density and low power are achieved, but flexibility for firmware updates is limited

Engineering Contradiction:

Improvepower consumptionVSAvoidfirmware update flexibility

Core Design Contradiction:

Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The patent segments the flash memory system into two distinct parts: a large non-volatile storage area for bulk data and a small logic NVM area for firmware instructions. This segmentation allows the firmware portion to be updated flexibly using low-power NVM programming while the bulk storage maintains high density characteristics, thus achieving both update flexibility and low power consumption.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS12619527B2Memory devices including logic non-volatile memory

Publication Date: 2026.05.05 MICRON TECHNOLOGY INC

AI summary

A memory device includes a first array of Non-Volatile Memory (NVM) cells, a second array of logic NVM cells, and a controller. The second array of logic NVM cells stores instructions for accessing the first array of NVM cells. The controller is configured to execute the instructions stored in the second array of logic NVM cells to perform access operations in the first array of NVM cells.