Logic Circuitry Package Hibernation for Addressable Print Components

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Solution Overview

Problem

Current printing systems face challenges in efficiently communicating and managing data between replaceable print apparatus components and the print apparatus, particularly in terms of identity, capabilities, status, and resource management, due to limitations in processing capacity and memory in these components.

Innovation Solution

The implementation of a logic circuitry package that includes a processor and memory, capable of executing commands and communicating via I2C protocol, allowing for addressable logic circuits to manage data and perform tasks such as authentication, sensor readings, and data processing, while enabling secure and reconfigurable communication addresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If replaceable print apparatus components include logic circuitry for communication and data management, then the system's ability to manage identity, capabilities, status and resources is improved, but the processing capacity and memory limitations of these components worsen the efficiency of data communication and management

Engineering Contradiction:
Improvedata management capabilityVSAvoidprocessing capacity limitation
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

A host system acts as an intermediary between the replaceable print apparatus component and the data management system. The host system receives data from the component via communication protocols (I2C, SPI, UART, USB), processes the data, and manages the information about identity, capabilities, and status. This mediator approach allows the component to maintain simple logic circuitry while the host system handles complex data management tasks.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If logic circuitry in replaceable components is simplified to reduce complexity, then ease of manufacture is improved, but the ability to perform monitoring functions and communicate data worsens

Engineering Contradiction:
Improvelogic circuitry simplicityVSAvoidmonitoring function capability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The logic circuitry in the replaceable component performs self-service by automatically generating and maintaining data about its identity, capabilities, and status. The component's logic circuitry executes instructions stored in its memory to populate data structures with information about print material levels, component health, and operational status, then transmits this data to the host system without requiring complex external processing.

Inventive Principle:
Principle #25Self-service

3Reliability

If communication protocols are made more robust for secure data transmission, then reliability is improved, but the processing time and energy consumption worsen

Engineering Contradiction:
Improvesecure communicationVSAvoiddata transmission time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Authentication and security protocols are executed preliminarily during the initial connection phase between the replaceable component and the host system. The logic circuitry in the component performs authentication routines and establishes secure communication channels before actual data transmission begins. This preliminary security setup allows subsequent data exchanges to proceed more efficiently without repeated authentication overhead.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11409487B2Power management in a logic circuitry package
Publication Date: 2022.08.09 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US11409487B2 patent drawing
  • US11409487B2 patent drawing
  • US11409487B2 patent drawing

AI summary

A logic circuitry package for a replaceable print apparatus component includes an interface including a power terminal and at least one logic circuit. The at least one logic circuit is configured to respond to communications sent to a first address via the interface and respond to communications sent to a second address via the interface. The at least one logic circuit is configured to in response to a first command sent to the first address, draw a first current on the power terminal; and in response to a hibernate command sent to the first address, respond to communications sent to the second address and draw a second current on the power terminal less than the first current.