Logic Circuitry Package With External Test Clock Switching

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Solution Overview

Problem

Current printing systems face challenges in efficiently communicating and managing data between replaceable print apparatus components and the print apparatus, particularly in ensuring reliable communication and accurate sensor readings due to limitations in existing communication protocols and the integration of logic circuitry within these components.

Innovation Solution

The implementation of a logic circuitry package that includes a clock generation circuit, a test controller, and a processor to facilitate I2C communication, enabling system integrity tests, clock signal management, and secure data processing, while allowing for multiple addresses and secure microcontroller functions to manage various requests and sensor operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing communication protocols are used for data transmission between replaceable components and print apparatus, then communication can be established, but communication reliability is insufficient and data accuracy is compromised

Engineering Contradiction:
Improvecommunication reliabilityVSAvoiddata accuracy
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent implements a feedback mechanism where the logic circuitry package performs self-diagnostic tests using an internal clock generator and test controller. The system monitors its own operational status and communicates diagnostic results back to the host controller, enabling real-time verification of communication integrity and data accuracy. This feedback loop ensures that any deviations from expected performance are detected and reported, thereby improving both communication reliability and data accuracy.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent incorporates preliminary testing and validation functions within the logic circuitry package before actual data transmission occurs. The internal test controller performs pre-communication checks on the communication interface and data integrity, ensuring that the system is ready for reliable data exchange. This preliminary action prevents communication errors and data corruption by identifying and addressing potential issues before they affect actual operations.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If logic circuitry is integrated within replaceable print apparatus components, then component functionality is enhanced, but device complexity increases

Engineering Contradiction:
Improvecomponent functionalityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal logic circuitry package that can perform multiple functions including data processing, communication protocol handling, sensor data validation, and self-diagnostic testing. This multi-functional design consolidates what would otherwise require separate dedicated circuits for each function, thereby enhancing component versatility while actually reducing overall device complexity through functional integration rather than proliferation of separate components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The logic circuitry package includes self-service capabilities through its internal test controller and clock generator, which automatically perform diagnostic functions and validate operational status without requiring external intervention. This self-service approach allows the component to autonomously monitor and report its own health status, enhancing functionality while minimizing the need for additional external monitoring circuitry, thus not increasing device complexity.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If sensor operations are managed within replaceable components, then monitoring accuracy is improved, but communication overhead increases

Engineering Contradiction:
Improvesensor reading accuracyVSAvoidcommunication overhead
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The logic circuitry package performs preliminary validation and processing of sensor readings locally before transmitting data to the host controller. By pre-validating sensor data integrity and filtering out obviously erroneous readings at the source, the system reduces the amount of data that requires communication verification, thereby maintaining high measurement precision while minimizing communication overhead and time loss.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms where the logic circuitry package sends concise status reports and validation results to the host controller rather than transmitting all raw sensor data. This feedback approach allows the host to verify critical measurements efficiently, maintaining measurement precision through selective verification while significantly reducing communication overhead by only transmitting essential validation information rather than complete data sets.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11345156B2Logic circuitry package
Publication Date: 2022.05.31 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US11345156B2 patent drawing
  • US11345156B2 patent drawing
  • US11345156B2 patent drawing

AI summary

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit. The at least one logic circuit is configured to receive, via the interface, a request to replace an internal clock signal from an internal clock generator of the logic circuitry package with an external test clock signal. The at least one logic circuit is configured to receive, via the interface, the external test clock signal. The at least one logic circuit is configured to replace the internal clock signal with the external test clock signal in the logic circuitry package.