Logic Path Delay Measurement for Dynamic IC Voltage Control

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Solution Overview

Problem

As integrated circuits face increasing power consumption due to higher transistor counts and operating frequencies, managing power consumption while ensuring correct operation is challenging, especially with leakage currents becoming a significant issue at lower transistor geometries, and reducing supply voltage can lead to incorrect operation.

Innovation Solution

An integrated circuit with a logic circuit, a local power manager, and a self-calibration unit that iteratively tests supply voltage magnitudes until a test fails, determining the lowest viable voltage for operation, and adjusts the supply voltage dynamically based on measured propagation delays through a series of logic gates to optimize power management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the supply voltage is reduced to lower power consumption, then power consumption decreases, but the digital circuit operation speed decreases and may cause incorrect operation at a given operating frequency

Engineering Contradiction:
Improvepower consumptionVSAvoiddigital circuit operation speed
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The patent implements dynamic voltage and frequency management by allowing the supply voltage and operating frequency to be adjusted in real-time based on actual circuit performance. The system dynamically determines the lowest viable supply voltage for each operating frequency through iterative testing, enabling the circuit to operate at optimal power consumption while maintaining correct operation. This dynamic adjustment resolves the contradiction by adapting the voltage-speed relationship to actual manufacturing variations and operating conditions rather than using fixed conservative values.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the supply voltage parameter dynamically based on measured circuit performance. By iteratively testing different supply voltage magnitudes and determining the lowest viable voltage for correct operation at each frequency, the system optimizes the voltage parameter to balance power consumption and operation speed. This parameter change approach allows the circuit to operate at the boundary between correct and incorrect operation, maximizing power efficiency while maintaining functionality.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the supply voltage is statically specified to ensure correct operation across all manufacturing variations and temperatures, then reliability is improved, but power consumption cannot be optimized for individual circuits

Engineering Contradiction:
Improvecorrect operationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements self-calibration functionality where each integrated circuit automatically determines its own lowest viable supply voltage for each operating frequency through iterative testing. The self-calibration unit performs measurements and adjustments without external intervention, allowing each circuit to self-optimize its power consumption based on its specific manufacturing characteristics. This self-service approach resolves the contradiction by enabling individual circuit optimization while maintaining reliability through built-in verification testing.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent performs preliminary calibration during manufacturing or initialization to determine the lowest viable supply voltage for each circuit before normal operation. By pre-determining the optimal voltage for each individual circuit across different operating frequencies, the system establishes reliable operating parameters in advance. This preliminary action resolves the contradiction by capturing manufacturing variations early and using that information to optimize power consumption during actual operation while ensuring reliability.

Inventive Principle:
Principle #10Preliminary action

3Quantity of substance

If transistor geometries are decreased to increase transistor count, then integration density is improved, but leakage current increases and becomes a larger component of power consumption

Engineering Contradiction:
Improvetransistor countVSAvoidleakage current
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent implements dynamic voltage management that responds to leakage current effects by adjusting the supply voltage based on actual circuit performance measurements. By continuously monitoring and adapting the voltage level, the system can operate at lower voltages where leakage current has less impact, thereby reducing the proportion of power consumed by leakage. This dynamic approach resolves the contradiction by adapting to the increased leakage characteristics of scaled transistors while maintaining functional operation.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7915910B2Dynamic voltage and frequency management
Publication Date: 2011.03.29 APPLE INC
  • US7915910B2 patent drawing
  • US7915910B2 patent drawing
  • US7915910B2 patent drawing

AI summary

In one embodiment, an integrated circuit includes a self calibration unit configured to iterate a test on a logic circuit in the integrated circuit at respectively lower supply voltage magnitudes until the test fails. A lowest supply voltage magnitude at which the test passes is used to generate a requested supply voltage magnitude for the integrated circuit. In an embodiment, an integrated circuit includes a series connection of logic gates physically distributed over an area of the integrated circuit, and a measurement unit configured to launch a logical transition into the series and detect a corresponding transition at the output of the series. The amount of time between the launch and the detection is used to request a supply voltage magnitude for the integrated circuit.