Logic Circuit Pullup Acceleration for Balanced Signal Delays
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Solution Overview
Problem
In logic circuits, non-monotonic functions lead to unbalanced signal path delays, which cannot be effectively addressed through transistor sizing, resulting in varying transition speeds that hinder high-speed applications.
Innovation Solution
The implementation of pullup and pulldown acceleration circuits with transistors coupled to input or inverted input logic values, allowing for faster output value transitions from 0 to 1 or 1 to 0 by controlling the pass gates and inverters, thereby balancing signal path delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If transistor sizing is used to balance signal path delays, then signal path delay balance is improved for monotonic functions, but signal path delay balance deteriorates for non-monotonic functions
Solution Approach 1:
The logic circuit is divided into multiple signal paths (first signal path and second signal path) with different transistor configurations. Each path is optimized independently to handle different logic transitions, allowing the system to achieve balanced delays for both monotonic and non-monotonic functions through selective path usage.
Solution Approach 2:
The circuit dynamically selects between different signal paths based on the logic values of input signals. Control signals activate or deactivate specific transistors to route signals through appropriate paths, enabling the circuit to adapt its delay characteristics to match the required logic transition type.
2Device complexity
If transistor sizing is applied to non-monotonic functions, then device complexity is reduced, but signal path delay balance deteriorates
Solution Approach 1:
Instead of using complex transistor sizing adjustments throughout the circuit, the solution segments the circuit into distinct signal paths with simpler, standardized transistor configurations. Each path is designed for specific logic transitions, reducing overall device complexity while maintaining delay balance.
Solution Approach 2:
Control signals and select logic act as intermediaries that manage which signal path is active based on input conditions. This intermediary layer simplifies the transistor configurations in each path while maintaining the ability to achieve balanced delays through selective path activation.
Data Source
AI summary
An electronic device includes a logic circuit, a pullup acceleration circuit, a first signal propagation path, and a second signal propagation path. The first signal propagation path propagates a logic value transition from an input terminal of the logic circuit to an output terminal of the logic circuit through the input terminal, two inverters of the logic circuit, a switch of the logic circuit, and the output terminal within a first amount of time based on a transition at the first input terminal. The second signal propagation path propagates the logic value transition from the input terminal to the output terminal through one inverter of the logic circuit and the pullup acceleration circuit within a second amount of time. The second amount of time is shorter than the first amount of time in response to the logic circuit being non-monotonic with respect to the logic value.