Programmable Logic Reconfiguration for Fault Isolation

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Solution Overview

Problem

Existing programmable logic circuit devices require full reconfiguration region initialization to address abnormalities, which is inefficient and resource-intensive.

Innovation Solution

A programmable logic circuit device with a processor that detects abnormalities and changes connections between elements in reconfiguration regions using specific reconfiguration data, allowing for targeted reconfiguration without initializing entire regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If full reconfiguration region initialization is performed to address abnormalities, then reliability is improved, but loss of time and productivity deteriorate

Engineering Contradiction:
Improveabnormality addressing capabilityVSAvoidreconfiguration time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The reconfiguration regions are divided into multiple segments, allowing the system to reconfigure only the affected segment when an abnormality is detected, rather than initializing the entire reconfiguration region. This segmentation enables partial reconfiguration, reducing the time and resources required while maintaining reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of performing complete reconfiguration of all reconfiguration regions, the system applies partial reconfiguration only to the specific region where the abnormality occurred. This partial action is sufficient to address the issue without the overhead of full reconfiguration, thereby reducing processing time and resource consumption.

Inventive Principle:
Principle #16Partial or excessive action

2Reliability

If full reconfiguration region initialization is performed to address abnormalities, then reliability is improved, but resource usage and device complexity increase

Engineering Contradiction:
Improveabnormality addressing capabilityVSAvoidreconfiguration overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By segmenting the reconfiguration regions, the system reduces the complexity of the reconfiguration process. Each segment can be managed and reconfigured independently, lowering the overall device complexity and resource requirements compared to managing a single large reconfiguration region.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system applies reconfiguration resources and processing power locally to only the affected region rather than distributing them across the entire device. This local quality approach optimizes resource usage and reduces the apparent device complexity by focusing computational efforts where needed.

Inventive Principle:
Principle #3Local quality

3Productivity

If targeted reconfiguration is implemented instead of full initialization, then productivity is improved, but ease of operation may deteriorate

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidreconfiguration control complexity
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The system implements self-service by automatically detecting abnormalities and triggering reconfiguration of the affected regions without requiring manual intervention. This automation maintains ease of operation while achieving high productivity through targeted reconfiguration.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system uses feedback mechanisms to monitor the state of reconfiguration regions and automatically initiate reconfiguration when abnormalities are detected. This feedback-driven approach simplifies operation by removing the need for manual control while maintaining high productivity through responsive, targeted reconfiguration.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12057835B2Programmable logic circuit device and image processing apparatus
Publication Date: 2024.08.06 FUJIFILM BUSINESS INNOVATION CORP
  • US12057835B2 patent drawing
  • US12057835B2 patent drawing
  • US12057835B2 patent drawing

AI summary

A programmable logic circuit device includes: a processor; and plural reconfiguration regions each including a circuit configured by change of connection between elements. The processor is configured to: upon detection of an abnormality while performing processing in a state in which the elements in the reconfiguration regions are connected in accordance with reconfiguration data designating connection between the elements in the reconfiguration regions, acquire reconfiguration data designating such connection between the elements that the processing being performed is not performed; and change connection between the elements in the reconfiguration regions in accordance with the designation by the acquired reconfiguration data.