Programmable Logic Reconfiguration Using Shared Configuration Data

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Solution Overview

Problem

Programmable logic circuit devices face inefficiencies in data storage and processing due to the need to hold extensive reconfiguration data for various processing tasks, leading to increased circuit scale and complexity.

Innovation Solution

A programmable logic circuit device with a processor that manages reconfiguration data by designating processing groups and using shared reconfiguration data where connections between elements do not need to change, reducing the storage and processing requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If all reconfiguration data for performing a series of processing including data input processing, certain processing on the data, and processing for outputting the data are held, then complete processing functionality is achieved, but the scale of held reconfiguration data increases

Engineering Contradiction:
Improveprocessing functionalityVSAvoidreconfiguration data scale
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent applies universality by enabling a single reconfiguration data set to serve multiple processing functions. The management data structure allows the same reconfiguration data to be referenced by multiple processing groups, enabling one reconfiguration pattern to be reused across different processing scenarios, thereby reducing the total volume of reconfiguration data needed while maintaining complete processing functionality

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges reconfiguration data management with processing group management through a unified management data structure. This structure combines information about processing groups, their constituent processing, and associated reconfiguration data into a single integrated system, allowing efficient referencing and reduction of redundant data storage

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If reconfiguration data is stored for every processing group, then processing flexibility is improved, but device complexity increases

Engineering Contradiction:
Improveprocessing flexibilityVSAvoiddata management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The management data structure serves multiple functions simultaneously: it stores processing group information, defines processing sequences, and references reconfiguration data. This multi-functional approach reduces the need for separate data structures for each aspect, thereby reducing overall device complexity while maintaining processing flexibility

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The management data acts as an intermediary layer between processing groups and reconfiguration data. Rather than directly storing all reconfiguration data for each processing group, the management data structure provides a reference mechanism that mediates between the two, reducing complexity by avoiding direct one-to-one mappings

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12040796B2Programmable logic circuit device and image processing apparatus
Publication Date: 2024.07.16 FUJIFILM BUSINESS INNOVATION CORP
  • US12040796B2 patent drawing
  • US12040796B2 patent drawing
  • US12040796B2 patent drawing

AI summary

A programmable logic circuit device includes: a processor; and plural reconfiguration regions each including a circuit configured by change of connection between elements, wherein the processor is configured to: receive designation of a processing group including a series of plural kinds of processing; acquire management data decided for each processing group, the management data designating plural pieces of reconfiguration data each designating connection between elements in a corresponding one of the plural reconfiguration regions so that the designated processing group is performed; acquire the plural pieces of reconfiguration data designated by the acquired management data; change connection between elements in the plural reconfiguration regions in accordance with the designation by the acquired plural pieces of reconfiguration data; and when connection between elements is changed in accordance with designation by the plural pieces of reconfiguration data, in a case where designation by at least one of the acquired plural pieces of reconfiguration data does not require change of connection in a corresponding one(s) of the plural reconfiguration regions, use same reconfiguration data as that used to connect the elements in the corresponding one(s) of the plural reconfiguration regions.