Power Domain Logic Retention via Clock Quiescence Mapping
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Solution Overview
Problem
Components in a power domain that do not support logic retention power mode requests trigger initialization or invalidation sequences when entering an 'OFF' power mode, leading to context loss or excessive start-up time, hindering software transparency and efficient power management.
Innovation Solution
A method and system that selectively distribute logic retention power mode requests, mapping them to clock quiescence requests for components that do not support logic retention, maintaining them in a functional power mode to avoid triggering initialization or invalidation sequences, ensuring software transparency and rapid entry/exit from low power modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If components enter OFF power mode to achieve low power consumption, then energy savings are improved, but context loss and excessive start-up time occur due to initialization sequences
Solution Approach 1:
The patent applies different power modes to different components based on their individual characteristics. Components that support logic retention are placed in logic retention mode to preserve context, while components without this capability are placed in OFF mode. This selective approach allows the system to achieve power savings without triggering initialization sequences across all components, thereby reducing start-up time.
Solution Approach 2:
The power domain is segmented into multiple groups of components based on their power mode capabilities. The distributor separates components into those that support logic retention power mode and those that do not, allowing independent power mode selection for each group. This segmentation enables the system to avoid unnecessary initialization sequences while maintaining power efficiency.
2Use of energy by moving object
If OFF power mode is used for components without logic retention support, then power consumption is reduced, but software transparency is lost due to context invalidation
Solution Approach 1:
The patent applies different power modes to different components based on their individual characteristics. Components that support logic retention are placed in logic retention mode to preserve context, while components without this capability are placed in OFF mode. This selective approach allows the system to achieve power savings without triggering initialization sequences across all components, thereby reducing start-up time.
3Loss of information
If logic retention power mode is applied to all components, then software transparency is maintained, but device complexity increases due to selective distribution requirements
Solution Approach 1:
Each component reports its power mode capabilities to the distributor, which automatically determines the appropriate power mode for each component based on its characteristics. This self-service approach allows the system to maintain software transparency through selective logic retention application without requiring complex manual configuration or control logic.
Solution Approach 2:
The distributor acts as an intermediary between the power controller and individual components. It receives power mode requests from the power controller and selectively distributes appropriate power modes to components based on their capabilities. This intermediary layer simplifies the overall system architecture by centralizing the decision-making logic and shielding components from complex power mode management.
Data Source
AI summary
Logic retention support in a data processing system is provided. In a system and a methodology thereof, secondary requests are distributed based on a logic retention power mode request to functional units of a power domain by mapping the logic retention power mode request to a clock quiescence request; distributing the clock quiescence request to one or more first functional units of the functional units that are without a logic retention power mode; and maintaining the one or more first functional units in a functional power mode.